SAR ADC Dynamic Range Extension With Reduced Reference Voltage

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Solution Overview

Problem

Conventional SAR ADC architectures use reference voltages equal to the maximum input voltage, which significantly affects the power consumption of the capacitive digital to analog converter (CDAC), leading to inefficiencies.

Innovation Solution

A SAR ADC design that utilizes a reference voltage approximately half the difference between the maximum and minimum input voltage, allowing for efficient power management by determining the digital output word based on comparisons with this reduced reference voltage, using a DAC, comparator, and SAR logic circuit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the reference voltage is set equal to the maximum input voltage in conventional SAR ADC architectures, then the ADC can cover the full input voltage range, but the power consumption of the CDAC increases significantly

Engineering Contradiction:
Improveinput voltage range coverageVSAvoidCDAC power consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent changes the reference voltage parameter from the conventional value (equal to maximum input voltage) to a new value (approximately half the difference between maximum and minimum input voltages). This parameter change allows the CDAC to operate with lower voltage swings, directly reducing power consumption while the SAR logic compensates through differential comparison to maintain full input range coverage.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If the reference voltage is reduced to approximately half the difference between maximum and minimum input voltages, then the CDAC power consumption decreases, but the ADC architecture requires modified SAR logic operation

Engineering Contradiction:
ImproveCDAC power consumptionVSAvoidSAR logic operation complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent segments the conversion process into two distinct phases: first comparing the input voltage against the reduced reference voltage to determine the MSB, then performing a second comparison to determine remaining bits. This segmentation of the conversion process allows the use of a lower reference voltage while maintaining accurate full-range conversion, at the cost of additional logical steps in the SAR controller.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs a preliminary comparison of the input voltage with the reduced reference voltage before completing the full conversion process. This preliminary action determines the most significant bit and establishes a baseline for subsequent comparisons, enabling the system to use a lower reference voltage while still achieving accurate full-range conversion through the follow-up comparison steps.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10291252B1Successive approximation register (SAR) analog to digital converter (ADC) dynamic range extension
Publication Date: 2019.05.14 SHENZHEN GOODIX TECH CO LTD
  • US10291252B1 patent drawing
  • US10291252B1 patent drawing
  • US10291252B1 patent drawing

AI summary

An ADC, including a DAC which receives an analog input voltage and a digital input word from SAR logic, and generates a first voltage based on the analog input voltage and the digital word. The ADC also includes a comparator, which receives the first voltage and a reference voltage, and generates a second voltage based on the first voltage and on the reference voltage. The second voltage has a value corresponding with a sign of the difference between the first voltage and the reference voltage. The ADC also includes the SAR logic circuit which receives the second voltage from the comparator. The SAR logic generates a digital output word based on a second voltages received from the comparator. A difference between the minimum input voltage on the maximum input voltage is substantially equal to two times a difference between reference voltage and the minimum input voltage.