SAR ADC Residue Integration for High-Resolution Linear Conversion
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Solution Overview
Problem
High-resolution analog-digital conversion in SAR-type ADCs is hindered by noise from the comparator and the challenge of achieving this at low power consumption, while also avoiding non-linearity issues in amplifying residual voltages.
Innovation Solution
A SAR-type ADC using residue integration, which includes a coarse/fine SAR conversion unit, a residue integration unit that amplifies residual voltage repeatedly with a predetermined gain, and a digital signal output unit that combines results from both conversion modes to produce a high-resolution digital code without non-linearity, utilizing a delta-signal modulation loop to control output voltage within a non-distorting range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the residual voltage is amplified with high gain to achieve high-resolution conversion, then the measurement precision is improved, but non-linearity distortion occurs in the output voltage
Solution Approach 1:
The conversion process is divided into coarse conversion and fine conversion stages. The coarse stage handles the majority of the conversion range, while the fine stage processes the residual voltage with higher precision. This segmentation allows each stage to operate within optimal gain ranges, avoiding non-linearity while achieving high overall resolution.
Solution Approach 2:
A feedback mechanism is implemented where the output of the fine SAR conversion is fed back to adjust the residual voltage processing. This feedback loop ensures that the amplifier operates within its linear range by continuously adjusting the input based on the output, thereby maintaining linearity while achieving high gain for fine-resolution conversion.
2Measurement precision
If the comparator noise is reduced to achieve high-resolution conversion, then the measurement precision is improved, but the power consumption increases
Solution Approach 1:
The conversion is segmented into coarse and fine stages, allowing the use of different comparator configurations for each stage. The coarse stage uses a standard comparator, while the fine stage uses a low-noise comparator only when needed, reducing overall power consumption while maintaining high resolution.
Solution Approach 2:
The fine SAR conversion is applied only to the residual voltage portion that requires high precision, rather than applying high-precision conversion to the entire signal range. This partial application of high-precision processing reduces power consumption while achieving the necessary measurement precision.
3Device complexity
If the SAR conversion is performed in a single stage to simplify the device structure, then the device complexity is reduced, but the measurement precision cannot achieve high resolution
Solution Approach 1:
The single SAR conversion is divided into two sequential conversions: coarse SAR conversion followed by fine SAR conversion. This segmentation enables high-resolution conversion by processing different portions of the signal with appropriate precision levels, achieving high measurement precision while keeping each conversion stage relatively simple.
Solution Approach 2:
The coarse and fine conversion results are merged through a combining circuit that integrates the digital outputs of both conversion stages. This merging process produces the final high-resolution digital output by combining the MSB from coarse conversion with the LSB from fine conversion, achieving high precision without requiring a single complex conversion stage.
Data Source
AI summary
The present invention relates to a successive approximation register (SAR)-type analog-digital converter (ADC), which can amplify a residual voltage without a non-linearity problem caused by an output voltage of a residual voltage amplifier, thereby performing high-resolution analog-digital conversion at low power consumption.The SAR-type ADC may include: a coarse/fine SAR conversion unit configured to receive an analog input voltage and convert the received voltage into an MSB digital signal in a coarse SAR conversion mode, and receive a feedback voltage and convert the received voltage into an LSB digital signal in a fine SAR conversion mode; and a residue integration unit configured to repeatedly amplify a residual voltage with a predetermined gain by a predetermined number of times and output the amplified voltage as a final target multiple, the residual voltage corresponding to a voltage difference between the analog input voltage and an analog voltage obtained by converting the digital signal into an analog signal.