SAR ADC Capacitor Array Self-Calibration for Weight Error Correction
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Solution Overview
Problem
Conventional methods for calibrating capacitance weight errors in successive approximation ADCs are costly and time-consuming, requiring extra hardware and manpower, and can only perform one-sign calibration, limiting accuracy due to manufacturing process offsets.
Innovation Solution
A method involving a comparator, capacitor set, and switch set, where a primary capacitor array and a secondary capacitor array with known capacitance weights are used to estimate capacitance weight errors through bit-cycling signals, allowing for digital estimation and calibration of capacitance weights without additional DACs, thereby reducing errors and increasing accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional calibration methods (laser trimming or FIB) are used to calibrate capacitance weight errors, then manufacturing precision is improved, but device complexity and manufacturing cost increase due to requiring extra equipment and manpower
Solution Approach 1:
The patent implements self-calibration by using the ADC's own internal capacitor arrays (primary and secondary capacitors) to measure and correct capacitance weight errors without requiring external laser trimming equipment or FIB facilities. The calibration process is performed automatically during manufacturing or operation using only the existing ADC structure and control logic.
Solution Approach 2:
The patent replaces mechanical/physical calibration methods (laser trimming, FIB) with an electrical measurement and computation system. Instead of physically modifying capacitors, the system uses electrical signals to measure capacitance ratios and computes correction values through digital processing, eliminating the need for complex physical calibration equipment.
2Ease of operation
If resistor type DAC is used for generating calibration voltage, then ease of operation is improved, but device complexity increases due to requiring extra hardware components
Solution Approach 1:
The patent makes the capacitor arrays serve multiple functions: they are used both for normal ADC operation and for self-calibration measurements. The same primary and secondary capacitors that perform signal conversion also serve as measurement elements for detecting capacitance weight errors, eliminating the need for separate calibration hardware.
Solution Approach 2:
The patent introduces a control unit as an intermediary that coordinates the calibration process. This control unit manages the switching of capacitors, generates the necessary control signals for measurement, and processes the results to determine correction values, replacing the need for a separate resistor-type DAC while maintaining ease of operation.
3Ease of operation
If resistor type DAC calibration method is used, then ease of operation is improved, but measurement precision deteriorates due to errors generated by the resistor type DAC
Solution Approach 1:
The calibration system uses the ADC's own capacitor arrays to measure capacitance ratios, making the measurement process self-referential and avoiding errors introduced by external components like resistor-type DACs. The measurement is performed using the same capacitor technology, ensuring consistency and eliminating cross-device error sources.
Solution Approach 2:
The patent changes the measurement approach from using voltage ratios (which are sensitive to resistor DAC errors) to directly measuring capacitance ratios through charge redistribution. By changing the physical parameter being measured from voltage to charge/capacitance, the system achieves higher precision that is not limited by resistor matching accuracy.
4Ease of manufacture
If one-sign calibration is performed, then ease of manufacture is improved, but measurement precision deteriorates due to inability to correct both positive and negative errors
Solution Approach 1:
The patent implements a feedback mechanism where the measured capacitance ratios are compared against ideal ratios, and correction values are computed based on the difference. This feedback loop allows the system to automatically determine whether errors are positive or negative and apply appropriate corrections, enabling two-sign calibration while maintaining manufacturing simplicity.
Solution Approach 2:
The patent changes the calibration approach from fixed one-sign correction to variable two-sign correction by allowing the correction values to be positive or negative based on the measured error direction. The control unit computes correction values that can increase or decrease capacitance weights as needed, expanding the correction range while keeping the manufacturing process simple.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables precise estimation and calibration of capacitance weight errors, enhancing the accuracy of successive approximation ADCs without the need for extra hardware, thus reducing manufacturing costs and time, and allowing for two-sign calibration.
Implementation Method 1
Electric charges are redistributed to all of the first capacitors and the auxiliary capacitor in the primary capacitor array and to the second capacitors in the secondary capacitor array
Data Source
AI summary
A successive approximation (SA) analog-to-digital converter (ADC) capable of estimating its own capacitance weight errors includes a comparator, a capacitor set, a switch set and a controller. The capacitor set includes a primary capacitor array including a plurality of binary-weighted capacitors, and a secondary capacitor array including a plurality of binary-weighted capacitors with known capacitance weights. The controller controls the switch set and repeats the steps of pre-charging the primary capacitor array, redistributing electric charges to the primary capacitor array and the secondary capacitor array, and performing a successive approximation binary searching on the primary capacitor array and the secondary capacitor array to calculate the capacitance weight error of each capacitor in the primary capacitor array. The calculated capacitance weight errors are used for calibrating the output of the successive approximation ADC.