Error-Feedback SAR-ADC Using Shared Capacitor Noise Shaping

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Solution Overview

Problem

Noise-shaping successive-approximation-register analog to digital converters (SAR-ADCs) face challenges in achieving high accuracy while maintaining power efficiency, as error-feedback structures increase the size and power consumption of the ADC.

Innovation Solution

The design incorporates an input sampling buffer with an amplifier and a gain-control capacitor that doubles as both a feedback capacitor for amplification and a residue voltage receiver, eliminating the need for separate capacitors and amplifiers, thereby reducing area and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If error-feedback structure is added to noise-shaping SAR-ADC, then accuracy is improved, but device size and power consumption increase

Engineering Contradiction:
ImproveaccuracyVSAvoiddevice size
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The gain-control capacitor is designed to perform dual functions: serving as the feedback capacitor for the amplifier during signal amplification and as the residue voltage receiver during error feedback. This multi-functionality eliminates the need for separate dedicated capacitors and amplifiers for error feedback, thereby improving accuracy through noise-shaping while avoiding the increase in device size and power consumption that would result from additional components

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The invention merges the error feedback path with the existing amplification path by having the gain-control capacitor serve both purposes. The residue voltage from the SAR-ADC is fed back to the gain-control capacitor, which then affects the level of subsequent samples during amplification. This combining of functions integrates the error feedback mechanism into the existing structure without adding separate dedicated components, thus improving accuracy while maintaining compact device size

Inventive Principle:
Principle #5Merging (Combining)

2Measurement precision

If error-feedback structure is added to noise-shaping SAR-ADC, then accuracy is improved, but power consumption increases

Engineering Contradiction:
ImproveaccuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by stationary object

Solution Approach 1:

The gain-control capacitor is designed to perform dual functions: serving as the feedback capacitor for the amplifier during signal amplification and as the residue voltage receiver during error feedback. This multi-functionality eliminates the need for separate dedicated capacitors and amplifiers for error feedback, thereby improving accuracy through noise-shaping while avoiding the increase in device size and power consumption that would result from additional components

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The invention merges the error feedback path with the existing amplification path by having the gain-control capacitor serve both purposes. The residue voltage from the SAR-ADC is fed back to the gain-control capacitor, which then affects the level of subsequent samples during amplification. This combining of functions integrates the error feedback mechanism into the existing structure without adding separate dedicated components, thus improving accuracy while maintaining compact device size

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11955983B2Error-feedback SAR-ADC
Publication Date: 2024.04.09 NORDIC SEMICONDUCTOR
  • US11955983B2 patent drawing
  • US11955983B2 patent drawing
  • US11955983B2 patent drawing

AI summary

Analog to digital conversion circuitry has an input sampling buffer, which has an input sampling capacitor for sampling an analog signal. The conversion circuitry also has a successive-approximation-register analog to digital converter (SAR-ADC) which converts the sampled analog signal to a digital signal. The input sampling buffer has an amplifier and a gain-control capacitor, and has an amplification configuration and an error-feedback configuration. In the amplification configuration, the input sampling capacitor is coupled to the amplifier and gain-control capacitor, with the gain-control capacitor connected in feedback with the amplifier, for applying gain to the sampled analog signal. In the error-feedback configuration, the gain-control capacitor is decoupled from the input sampling capacitor and receives a residue voltage from the SAR-ADC, such that the level of the analog signal determined in the amplification configuration varies depending on the residue voltage received onto the gain-control capacitor in the error-feedback configuration.