SAR ADC Comparator Split Inputs for Integer Capacitor Arrays
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Solution Overview
Problem
Conventional SAR ADCs face challenges due to non-integer capacitance in series-connected capacitors, leading to conversion errors and prolonged stability times, as well as difficulties in accurate drawing and adjustment of capacitors.
Innovation Solution
The SAR ADC employs a comparator with MSB and LSB capacitor arrays coupled to different terminals, allowing for separate processing and adjustment of terminal potentials, eliminating the need for a series-connected capacitor and enabling rapid charge redistribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a series-connected capacitor C*32/31 is used to connect MSB and LSB capacitor arrays, then the capacitor area shrinks, but the capacitance becomes non-integer leading to conversion errors
Solution Approach 1:
The capacitor array is segmented into MSB and LSB groups that are independently connected to different comparator terminals. This eliminates the need for a series-connected capacitor with non-integer capacitance, as each group can be independently designed with integer capacitance values while maintaining the overall functionality of the ADC system.
Solution Approach 2:
The comparator acts as an intermediary element with two separate input terminals, allowing the MSB and LSB capacitor arrays to be connected independently without requiring a series-connected capacitor. This mediator approach resolves the capacitance matching problem by enabling separate connection paths.
2Measurement precision
If all capacitors participate in charge distribution during each conversion, then conversion accuracy is maintained, but the time to reach stability is prolonged
Solution Approach 1:
The capacitor array is divided into MSB and LSB groups that can be activated separately during conversion. This segmentation allows selective charge distribution among only the necessary capacitors for the current conversion stage, reducing the total time required to reach stability while maintaining conversion accuracy through controlled charge redistribution.
Solution Approach 2:
The system dynamically activates only the necessary capacitor groups (MSB or LSB) based on the conversion stage, rather than having all capacitors participate in every conversion. This dynamic approach reduces the number of active capacitors during each operation, thereby decreasing the time to reach stability while preserving measurement precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces conversion errors, accelerates stability, and simplifies capacitor matching and calibration, while allowing for efficient voltage division and processing in high-resolution applications.
Implementation Method 1
an SAR ADC having a comparator and a most significant bit (MSB) and a least significant bit (LSB) capacitor arrays respectively coupled to positive and negative terminals of the comparator
Data Source
AI summary
The configuration of a successive approximation analog to digital converter (ADC) and a method thereof are provided in the present invention. The proposed configuration includes a comparator having an inverting input terminal, a non-inverting input terminal and an output terminal outputting a comparison result, a most significant bit ADC coupled to the non-inverting input terminal, and a least significant bit ADC coupled to the inverting input terminal.