SAR ADC Switching Network for Reference Rail Memory Effects

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Solution Overview

Problem

Successive approximation register (SAR) analog-to-digital converters (ADCs) experience nonlinear memory effects due to large current draws from the reference rail, causing voltage drops that distort subsequent conversions, leading to performance degradation.

Innovation Solution

A capacitor array with a switching network is used to switch capacitors between a supply voltage source and the reference rail, compensating for voltage drops before the next conversion cycle, thereby reducing the need for large capacitors and minimizing current consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If SAR ADC draws large current from reference rail during conversion, then conversion speed is maintained, but reference voltage drops causing nonlinear memory effects and performance degradation

Engineering Contradiction:
Improveconversion speedVSAvoidconversion accuracy
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The capacitor array is pre-charged to the reference voltage before each conversion cycle. This preliminary action ensures that when the ADC draws large current during conversion, the capacitors can immediately supply charge without causing reference voltage drops, thus preventing nonlinear memory effects while maintaining conversion speed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The capacitor array acts as an intermediary energy storage element between the reference voltage source and the ADC converter. It decouples the large current draw of the ADC from the reference voltage source, allowing the ADC to operate at full speed without distorting the reference voltage, thereby resolving the conflict between speed and accuracy.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Stability of the object's composition

If large capacitors are used to compensate for voltage drops, then reference voltage stability is improved, but device area increases

Engineering Contradiction:
Improvereference voltage stabilityVSAvoidcapacitor area
Core Design Contradiction:
Stability of the object's compositionVSArea of stationary object

Solution Approach 1:

Instead of using continuously connected large capacitors, the patent employs periodic charging and discharging of the capacitor array synchronized with the conversion cycles. The capacitors are charged during idle periods and discharged during conversion, providing voltage compensation only when needed. This periodic operation allows much smaller capacitor values to achieve the same stability effect, reducing device area.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The capacitor array is pre-charged to the required voltage level before each conversion cycle begins. This preliminary charging action ensures that the capacitors are ready to immediately compensate for voltage drops during conversion, eliminating the need for continuously large capacitors and thereby reducing the required capacitor area while maintaining reference voltage stability.

Inventive Principle:
Principle #10Preliminary action

3Stability of the object's composition

If continuous voltage compensation is applied, then reference voltage stability is maintained, but power consumption increases

Engineering Contradiction:
Improvereference voltage stabilityVSAvoidpower consumption
Core Design Contradiction:
Stability of the object's compositionVSUse of energy by moving object

Solution Approach 1:

The voltage compensation is applied periodically only during and between conversion cycles rather than continuously. The capacitor array is charged and discharged in synchronization with the ADC operation, providing compensation exactly when needed and remaining inactive during idle periods. This periodic operation dramatically reduces average power consumption compared to continuous compensation while maintaining reference voltage stability during conversions.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The capacitor array serves itself by being automatically recharged during idle periods between conversions, requiring minimal external control. The system uses the idle time naturally occurring in the conversion process to recharge the capacitors, eliminating the need for continuous power-consuming regulation circuits and achieving stable reference voltage with low average power consumption.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution is more space-efficient and energy-efficient, imposing fewer limitations on bandwidth and backoff tradeoffs, while maintaining signal quality by compensating for voltage drops before they affect subsequent conversions.

Implementation Method 1

a capacitor array with a switching network is used to switch capacitors between a supply voltage source and the reference rail, compensating for voltage drops before the next conversion cycle

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS20240405781A1Successive approximation register analog-to-digital converter
Publication Date: 2024.12.05 INTEL CORP
  • US20240405781A1 patent drawing
  • US20240405781A1 patent drawing
  • US20240405781A1 patent drawing

AI summary

A circuit comprising: an analog-to-digital converter configured to generate a digital signal based on a received input voltage and a received reference voltage; a capacitor array; and a switching network configured to switch each capacitor of the capacitor array between a first conductor connected to a supply voltage source, and a second conductor connected to the reference voltage; wherein the analog-to-digital converter comprises a logic configured to control the switching network to selectively switch between the first conductor and the second conductor based on the generated digital signal.