SAR ADC Weight Correction for Capacitor Offset Linearity
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Solution Overview
Problem
Successive-approximation register analog-to-digital converters (SAR ADCs) experience distortion in conversion due to capacitor offset values during manufacturing, which mismatch capacitance values with preset weight values, leading to suboptimal signal conversion.
Innovation Solution
A correction method and system that utilize a processor to generate an offset value sequence from the transforming curve, correcting the original weight value sequence to produce a corrected weight value sequence, ensuring the corrected values align with capacitor capacitance values, thereby preventing distortion in SAR ADC conversions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If capacitor array is used with preset weight values in SAR ADC, then conversion speed and simplicity are improved, but manufacturing offset causes capacitance values to mismatch weight values leading to distortion
Solution Approach 1:
The patent applies preliminary action by measuring the actual capacitance values of all capacitors in the array during a calibration phase before normal operation. The processor stores these measured values and uses them to calculate correction coefficients that compensate for manufacturing offsets. This preliminary measurement and correction setup enables the SAR ADC to maintain high conversion speed while accounting for manufacturing variations.
Solution Approach 2:
The patent changes the weight values used in conversion from fixed preset values to dynamically adjusted values based on measured capacitance. The processor calculates correction coefficients by comparing actual capacitance values with ideal values, then applies these coefficients to adjust the weight values during operation. This parameter change allows the system to compensate for manufacturing offsets without sacrificing conversion speed.
2Device complexity
If capacitor offset is not corrected, then device complexity remains low, but conversion accuracy and linearity deteriorate due to distortion
Solution Approach 1:
The patent introduces an intermediary element - the processor - that acts as a mediator between the simple capacitor array and the desired accurate conversion. The processor measures actual capacitance values, calculates correction coefficients, and adjusts weight values computationally. This intermediary approach maintains the simplicity of the analog circuit while achieving high accuracy through digital processing.
Solution Approach 2:
The patent replaces the need for mechanically precise capacitor manufacturing with a computational approach. Instead of relying on precise physical fabrication, the system uses the processor to measure actual values and apply mathematical corrections. This substitution of mechanical precision requirements with computational correction achieves high accuracy without increasing analog circuit complexity.
Data Source
AI summary
A successive-approximation register analog-to-digital converter (SAR ADC), a correction method and a correction system are provided. The SAR ADC generates an original weight value sequence according to multiple original weight values. The SAR ADC converts an analog time-varying signal to establish a transforming curve corresponding to the original weight values. In addition, the SAR ADC generates an offset value sequence according to an offset of the transforming curve, uses the offset value sequence to correct the original weight value sequence to generate a corrected weight value sequence, and uses multiple corrected weight values of the corrected weight sequence to improve linearity of the transforming curve.