Dynamic Comparator Topology for Thermal and Kickback Noise in SAR ADCs
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Solution Overview
Problem
Comparators in successive approximation register digital-to-analog converters (SAR ADCs) face challenges with thermal noise degrading signal-to-noise ratio and kickback noise introducing non-linearity, which necessitate trade-offs between conversion speed and noise levels.
Innovation Solution
The comparator circuit design includes specific configurations of transistors and control signals to reduce thermal noise by accelerating the regeneration phase without affecting initial integration time, and incorporates cascode transistors to minimize kickback noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If dynamic comparator is used to increase conversion speed, then productivity is improved, but thermal noise increases degrading signal-to-noise ratio
Solution Approach 1:
The comparator operation is divided into distinct phases: an integration phase where inputs are sampled and held, followed by a regeneration phase where the output is amplified. This segmentation allows noise to be confined to specific time windows rather than continuously affecting the output, thereby improving signal-to-noise ratio while maintaining fast conversion speed.
Solution Approach 2:
The integration phase performs preliminary action by sampling and holding the input signals before the regeneration phase. This preliminary integration of the differential input voltage across a controlled period establishes a stable baseline that reduces the impact of subsequent noise during the regeneration and output phase.
2Object-affected harmful factors
If regeneration phase is accelerated to reduce thermal noise, then signal-to-noise ratio is improved, but conversion speed may be affected
Solution Approach 1:
The comparator employs dynamic control of transistor switching to accelerate the regeneration phase. By dynamically adjusting the switching timing and using positive feedback through cross-coupled transistors, the regeneration process is sped up, allowing the output to reach its final state faster, thus reducing thermal noise impact without sacrificing overall conversion speed.
3Measurement precision
If cascode transistors are added to minimize kickback noise, then measurement precision is improved, but device complexity increases
Solution Approach 1:
Cascode transistors are introduced as intermediary elements between the input differential pair and the output stage. These cascode devices act as mediators that isolate the input stage from the output loading effects, thereby reducing kickback noise and improving linearity. The cascode configuration provides impedance transformation and shielding that minimizes the direct coupling of noise back to the inputs.
Data Source
AI summary
A comparator circuit includes a first transistor configured to receive a first input and a second transistor configured to receive a second input. The comparator circuit further includes a third transistor coupled to a terminal of each of the first and second transistors. The third transistor is configured to be controlled by a first control signal. A gate of a fifth transistor is coupled to a terminal of a fourth transistor at a first node and a gate of the fourth transistor is coupled to a terminal of the fifth transistor at a second node. A sixth transistor is coupled between the first and fourth transistors. A seventh transistor is coupled between the second and fifth transistors. A gate of the sixth transistor and a gate of the seventh transistor are coupled together at a fixed voltage level.