Successive Approximation Data Converter With Full-Range Digital Calibration
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Solution Overview
Problem
High-resolution data converters face challenges in achieving accurate conversions while maintaining cost-effectiveness, due to limitations in element matching and the use of scaling capacitors that cause parasitic mismatching, leading to non-monotonicities and reduced input ranges.
Innovation Solution
A data converter system that employs self-calibration methods to determine and store calibration values, using oversized scaling capacitors to ensure accurate conversions by compensating for capacitor mismatches and maintaining full input range through digital calibration without reducing the ADC input range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If scaling capacitors are used in high-resolution data converters, then conversion resolution is improved, but parasitic mismatching occurs leading to non-monotonicities and reduced input range
Solution Approach 1:
The patent applies preliminary action by performing self-calibration before normal conversion operations. The calibration process pre-determines correction values for capacitor mismatches and stores them in calibration registers. This preliminary calibration eliminates non-monotonicities and restores full input range before actual conversions occur, allowing the system to achieve high resolution without the harmful effects of parasitic mismatching
Solution Approach 2:
The patent implements feedback through a self-calibration mechanism that measures actual capacitor values and uses this information to generate correction values. The calibration process feeds back corrected conversion results that compensate for parasitic effects, ensuring accurate conversions across the full input range while maintaining high resolution performance
2Measurement precision
If digital calibration is performed to correct capacitor mismatches, then conversion accuracy is improved, but ADC input range is reduced
Solution Approach 1:
The patent resolves this contradiction by performing calibration in advance before normal operations. The calibration values are determined and stored beforehand, allowing accurate corrections to be applied without restricting the input range during actual conversions. This preliminary calibration ensures both high accuracy and full input range availability
Solution Approach 2:
The patent introduces calibration registers as an intermediary element that stores correction values separately from the main conversion path. This intermediary structure allows calibration data to be applied without interfering with the full input range, enabling accurate corrections while maintaining unrestricted ADC operation during normal conversions
3Reliability
If self-calibration circuitry is added to eliminate non-monotonicities, then conversion reliability is improved, but device complexity increases
Solution Approach 1:
The patent applies universality by designing self-calibration circuitry that uses the same capacitors and control mechanisms already present in the data converter. The calibration process multi-uses existing components for both normal conversion and calibration functions, avoiding the need for separate dedicated calibration hardware and thereby minimizing the increase in device complexity while still improving conversion reliability
Solution Approach 2:
The patent implements self-service through automatic self-calibration that requires minimal external intervention. The system automatically performs calibration sequences, determines correction values, and stores them without requiring complex external testing equipment or manual adjustment circuits. This self-calibrating capability improves reliability while keeping additional circuitry to a minimum
Data Source
AI summary
A data converter for converting analog signals to digital signals, or for converting digital signals to analog signals is provided. In one embodiment, a production self-test is provided. In one embodiment, a high-speed lower-resolution method or mode for a data converter is provided. In one embodiment, a differential data converter with a more stable comparator common mode voltage is provided. In one embodiment, the input range of a digitally calibrated data converter is provided and maintained so that there is no loss in input range due to the calibration. In one embodiment, digital post-processing of an uncalibrated result using a previously stored calibration value is provided.