SAS Expander Routing Memory Tag Encoding
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Solution Overview
Problem
The high cost and complexity of implementing Content-Addressable Memory (CAM) and Random Access Memory (RAM) structures in SAS expanders for efficient routing, which increases the size and cost of the devices as the number of ports increases.
Innovation Solution
Representing ports in routing memory using start and length tags, or start and stop tags, to reduce memory usage, allowing for more efficient storage and processing of routing information in SAS expanders.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If CAM and RAM structures are used for routing in SAS expanders, then routing performance is improved, but device size and cost increase
Solution Approach 1:
The patent changes the parameter representation from individual bit per PHY to start tag and length tag format. This parameter encoding change reduces the memory entry size from N bits to approximately log2(N) + log2(log2(N)) bits, significantly decreasing the total memory required while maintaining routing functionality
Solution Approach 2:
The patent extracts only the essential routing information (start PHY and length/stop PHY) from the complete port configuration, eliminating redundant detail storage. This extraction approach keeps the routing memory compact while preserving the necessary connectivity information for performance routing
2Adaptability or versatility
If the number of ports in SAS expander increases, then connectivity and bandwidth are improved, but routing memory size increases
Solution Approach 1:
The patent implements parameter change by using variable-length encoding for port representations. Instead of fixed N bits per port, the system uses start tags (log2(N) bits) and length tags (log2(log2(N)) bits), making the memory requirement grow much slower as the number of ports increases
Solution Approach 2:
The patent transitions from a flat bit-array representation to a structured tag-based representation with semantic dimensions (start position, length). This dimensional reorganization allows efficient encoding of port ranges and significantly reduces the quantity of memory bits needed
3Power
If wide ports with multiple PHYs are supported, then bandwidth is improved, but memory entry complexity increases
Solution Approach 1:
The patent merges multiple PHY entries into a single memory entry using start and length tags. Instead of storing separate bit flags for each PHY in a wide port, the system stores one consolidated entry that represents the entire port range, reducing memory entry complexity while supporting high bandwidth
Data Source
AI summary
Methods and structure are provided for representing ports of a Serial Attached SCSI (SAS) expander circuit within routing memory. The SAS expander includes a plurality of PHYs and a routing memory. The routing memory includes entries that each indicate a set of PHYs available for initiating a connection with a SAS address, and also includes an entry that represents a SAS port with a start tag indicating a first PHY of the port and a length tag indicating a number of PHYs in the port. The SAS expander also includes a Content Addressable Memory (CAM) including entries that each associate a SAS address with an entry in the routing memory. Further, the SAS expander includes a controller that receives a request for a SAS address, uses the CAM to determine a corresponding routing memory entry for the requested SAS address, and selects the port indicated by the corresponding routing memory entry.