Shared SAS Switch Cache for Scalable Storage
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Solution Overview
Problem
Current data storage systems, particularly SAS and SATA devices, face performance limitations due to confined cache implementations within individual enclosures, limiting access and scalability, as data stored in one enclosure is not directly accessible by others, leading to inefficient use of cache resources.
Innovation Solution
A shared high-speed cache is integrated into a SAS switch, enabling data storage across multiple host and target devices, with control programming to determine whether data should be stored or retrieved from the cache, and dynamically allocating cache resources based on access frequency to optimize performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If cache is implemented within each enclosure, then each enclosure has local data access capability, but cache utility is limited to the particular enclosure and not scalable
Solution Approach 1:
The patent merges cache resources from multiple enclosures into a unified shared cache accessible by all enclosures through the SAS switch. This consolidation allows any enclosure to access any cached data, dramatically increasing cache utility and eliminating the limitation of local-only access while reducing overall system complexity.
Solution Approach 2:
The shared cache implementation makes the cache universally accessible by all enclosures and host systems, transforming it from an enclosure-specific resource to a system-wide resource. This multi-functional approach allows the same cache infrastructure to serve multiple purposes and multiple users simultaneously.
2Speed
If cache is implemented within each enclosure, then local access is fast, but it is not cost effective and not scalable
Solution Approach 1:
By combining cache resources into a shared infrastructure accessible through the SAS switch, the system maintains fast data access speeds for all enclosures simultaneously, rather than requiring each enclosure to have its own dedicated cache. This approach enables scalability as new enclosures can access the shared cache without additional per-enclosure cache investments.
Solution Approach 2:
The SAS switch acts as an intermediary that enables fast access to the shared cache for all enclosures. It manages cache access requests from multiple enclosures and host systems, providing rapid data retrieval while coordinating access to the shared cache resource, thus maintaining speed while enabling scalability.
3Ease of manufacture
If cache is confined to individual enclosures, then implementation is simple, but cache resources cannot be shared across enclosures
Solution Approach 1:
The patent merges previously isolated cache resources into a unified shared cache through the SAS switch infrastructure. This consolidation maintains implementation simplicity by utilizing existing SAS switch capabilities while dramatically enhancing cache sharing capability across all connected enclosures and host systems.
Solution Approach 2:
The SAS switch serves as an intermediary that enables cache sharing without requiring complex modifications to individual enclosures. It manages the shared cache resource and coordinates access requests from multiple enclosures, providing cache sharing capability while keeping the implementation approach straightforward and building on existing infrastructure.
Data Source
AI summary
A data storage system includes at least one host device configured to initiate a data request, at least one target device configured to store data, and a serial attached SCSI (SAS) switch coupled between the at least one host device and the at least one target device. The SAS switch includes a cache memory and includes control programming configured to determine whether data of the data request is stored in the cache is at least one of data stored in the cache memory of the SAS switch or data to be written in the cache memory of the SAS switch. The cache memory of the SAS switch is a shared cache that is shared across each of the at least one host device and the at least one target device.