SAS Target Connection Management via Hardware Context Caching

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Solution Overview

Problem

Current data storage systems using serial storage protocols like SAS face inefficiencies in processing storage commands, particularly due to high latency and throughput limitations, as they often require CPU involvement for every command and struggle with temporary data under-runs and duplicate tags.

Innovation Solution

Implementing a hardware-implemented front-end in storage devices that pre-configures multiple connection contexts, caches recent connection contexts, estimates and prefetches data to prevent under-runs, and uses a hash table to detect duplicate tags, allowing for autonomous execution of storage commands and reducing CPU dependency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If CPU involvement is required for every storage command processing, then connection management can be flexible and adaptive, but processing latency increases and throughput decreases

Engineering Contradiction:
Improvestorage throughputVSAvoidprocessing latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent segments connection management into two parts: common connection handling is done by hardware context caches, while exceptional cases are handled by CPU software. This segmentation allows most commands to be processed quickly in hardware without CPU involvement, improving throughput and reducing latency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements pre-configured connection contexts in hardware that are prepared in advance. When a storage command arrives, the hardware can immediately use the pre-configured context without waiting for CPU processing, thereby reducing processing latency and increasing throughput.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If hardware pre-configures multiple connection contexts, then processing speed increases and CPU involvement decreases, but device complexity increases

Engineering Contradiction:
Improvestorage throughputVSAvoidhardware complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The hardware context cache is designed to handle multiple connection contexts universally, allowing the same hardware structure to manage many different connections simultaneously. This multi-functionality improves throughput without proportionally increasing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent changes the parameter of connection context storage from software-managed to hardware-pre-configured, enabling faster processing. The context cache stores connection parameters in hardware, allowing rapid access and processing while maintaining manageable complexity through structured design.

Inventive Principle:
Principle #35Parameter changes

3Loss of time

If connection contexts are cached in hardware, then processing latency reduces and throughput increases, but memory resources are consumed

Engineering Contradiction:
Improveprocessing latencyVSAvoidmemory resources
Core Design Contradiction:
Loss of timeVSQuantity of substance

Solution Approach 1:

The patent implements a partial caching strategy where only the most frequently used or recently used connection contexts are stored in the hardware context cache. This partial action approach reduces memory resource consumption while still achieving significant latency reduction for the majority of commands.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS10089041B2Efficient connection management in a SAS target
Publication Date: 2018.10.02 APPLE INC
  • US10089041B2 patent drawing
  • US10089041B2 patent drawing
  • US10089041B2 patent drawing

AI summary

A method for data storage includes, in a storage device that communicates with a host over a storage interface for executing a storage command in a memory of the storage device, estimating an expected data under-run between fetching data for the storage command from the memory and sending the data over the storage interface. A data size to be prefetched from the memory, in order to complete uninterrupted execution of the storage command, is calculated in the storage device based on the estimated data under-run. The storage command is executed in the memory while prefetching from the memory data of at least the calculated data size.