SATA Throttling via ALIGN Primitive Insertion

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Solution Overview

Problem

SATA storage devices experience performance bottlenecks due to limited data transfer throughput and inefficiencies in flow control mechanisms, which result in reduced effective data transfer rates and increased latency.

Innovation Solution

Implementing ALIGN primitives during data transfers to throttle the data rate, allowing the receiving device to discard these primitives and thereby reduce the need for conventional flow control sequences, thus minimizing latency and FIFO overflow.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional flow control sequences (HOLD/HOLDA) are used to prevent FIFO overflow, then data transfer reliability is improved, but effective data transfer rate deteriorates due to round-trip handshake latency

Engineering Contradiction:
ImproveFIFO overflow preventionVSAvoideffective data transfer rate
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent uses ALIGN primitives as disposable, easily discardable objects to control data flow. Instead of using complex HOLD/HOLDA handshake sequences that consume time and resources, the system inserts ALIGN primitives that the receiving device can quickly discard without expensive round-trip communication. This replaces a costly flow control mechanism with a cheap, one-way signaling approach.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Duration of action of moving object

If data FIFO size is increased to delay flow control sequences, then data transfer continuity is improved, but device complexity and die area worsen

Engineering Contradiction:
Improvedata transfer continuityVSAvoidFIFO size
Core Design Contradiction:
Duration of action of moving objectVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by proactively inserting ALIGN primitives into the data stream before the FIFO reaches its overflow threshold. This anticipatory approach allows the system to control the data transfer rate in advance, preventing FIFO overflow without needing a larger buffer. The ALIGN primitives are inserted at predetermined intervals based on throttle values, ensuring continuous data flow while maintaining the original FIFO size.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If ALIGN primitives are inserted to reduce data transfer rate, then flow control overhead is reduced, but data transfer rate worsens

Engineering Contradiction:
Improveeffective data transfer rateVSAvoiddata transfer rate
Core Design Contradiction:
ProductivityVSSpeed

Solution Approach 1:

The patent changes the parameter of data transfer rate by dynamically adjusting the insertion frequency of ALIGN primitives based on throttle values. By modifying this parameter, the system can control the effective data transfer rate to match the receiving device's processing capacity, thereby reducing flow control overhead and improving overall efficiency without permanently reducing the interface speed.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7747796B1Control data transfer rates for a serial ATA device by throttling values to control insertion of align primitives in data stream over serial ATA connection
Publication Date: 2010.06.29 NVIDIA CORP
  • US7747796B1 patent drawing
  • US7747796B1 patent drawing
  • US7747796B1 patent drawing

AI summary

Systems and methods for performing data transfer rate throttling o improve the effective data transfer rate for SATA storage devices. The data transfer rate is diluted by inserting ALIGN primitives when data is sent. The receiving device simply discards the ALIGN primitives. Therefore, the receive data FIFO does not fill as quickly and fewer flow control sequences are needed for flow control to prevent the receive data FIFO from overflowing. An advantage of using the ALIGN primitives instead of conventional flow control is that the round-trip handshake latency is not incurred to disable and later enable data transfers.