Calibrated SATA OOB Signal Detection in Idle States
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Solution Overview
Problem
Existing signal detection apparatuses in SATA protocols face inaccuracies due to variations in production processes, leading to incorrect signal detection when the system enters an idle state, as they rely on RC circuits which are not precise enough.
Innovation Solution
A signal detection apparatus comprising a calibrated clock generation device with a crystal clock generator and a fast/multi-frequency clock generator, which generates a sampling clock signal to accurately determine whether an input signal is an out-of-band (OOB) signal by activating the fast/multi-frequency clock generator when in an idle state, ensuring precise timing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If RC circuits are used to detect input signals during idle states, then the apparatus can operate in idle state, but detection accuracy deteriorates due to production process variations
Solution Approach 1:
The patent uses a calibration clock signal as a reference copy to compare against the input signal during idle states. Instead of relying on RC circuit timing which varies with production processes, the system creates a known good reference waveform and compares the actual signal against it, eliminating the impact of manufacturing variations on detection accuracy
Solution Approach 2:
The patent changes the operational parameters by switching from RC circuit-based timing to a calibrated clock signal with fixed, precise timing parameters. The calibration clock generator produces signals with controlled frequency and timing that are immune to production process variations, thereby maintaining detection accuracy while enabling idle state operation
2Use of energy by moving object
If clock generator turns off during idle states to save power, then energy consumption is reduced, but signal detection capability is lost
Solution Approach 1:
The patent performs preliminary calibration during active states when the main clock generator is running, storing calibration data that allows the calibration clock generator to produce accurate reference signals during idle states without needing the main clock generator, thus enabling power savings while maintaining detection capability
Solution Approach 2:
The calibration clock generator acts as an intermediary that can operate independently with lower power consumption. It provides the necessary clock signals for detection during idle states without requiring the main clock generator to remain active, bridging the gap between power savings and detection capability
Data Source
AI summary
The invention discloses a signal detection apparatus and method thereof for detecting whether an input signal of a set of serial ATA signals is an out of band (OOB) signal. The signal detection apparatus includes a calibrated clock generation device, a signal processor, and a logic determination device. The calibrated clock generation device generates a sampling clock signal according to a predetermined clock signal. The signal processor generates a plurality of detection results based on the sampling clock signal and the input signal. The logic determination device receives the plural of detection results and determines whether the input signal is the OOB signal.