SATA Squelch Circuit Switching for OOB Detection Power Saving

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Solution Overview

Problem

Current SATA and AHCI specifications require the squelch circuit and OOB detector circuit to be constantly powered and activated, despite being used infrequently, leading to inefficiencies in power management and no existing method allows for their power down or deactivation while maintaining proper SATA host and device operation.

Innovation Solution

A method to selectively enable and disable the squelch circuit across various SATA and AHCI power states, including PHY Ready, Partial, Slumber, and AHCI Listen modes, allowing for power saving by enabling and disabling the OOB detection circuit accordingly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the squelch circuit and OOB detector circuit are constantly powered and activated as required by SATA and AHCI specifications, then proper SATA host and device operation is maintained, but power consumption increases and power management efficiency deteriorates

Engineering Contradiction:
Improveproper SATA operationVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic power management by selectively enabling and disabling the squelch circuit and OOB detector circuit based on the current power state (AHCI Listen mode, SATA power states) and operational requirements. The circuits are activated only when needed for OOB signal detection and deactivated during idle periods, transforming static constant-power operation into dynamic adaptive operation that matches actual system needs.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameters of the squelch circuit and OOB detector circuit by transitioning between enabled and disabled states based on detected conditions. The system monitors for OOB signals and adjusts the power state of these circuits accordingly, changing parameters such as power consumption, operational mode, and detection sensitivity to optimize both reliability and energy efficiency.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If the squelch circuit is disabled during idle periods to save power, then power consumption decreases, but the ability to detect OOB signals may be compromised

Engineering Contradiction:
Improvepower savingVSAvoidOOB signal detection capability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the system continuously monitors for OOB signal conditions and adjusts the power state of the squelch circuit and OOB detector circuit accordingly. When OOB signals are detected or suspected, the circuits are enabled; when idle with no OOB activity, they are disabled. This closed-loop feedback ensures reliable detection while maximizing power savings.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent enables the squelch circuit and OOB detector circuit in advance before OOB signals are actually received, based on predictive criteria such as transition to active power states or detected signal patterns. This preliminary activation ensures the circuits are ready to detect OOB signals immediately when needed, while still allowing power savings during confirmed idle periods.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8686757B2Apparatus and method for selectively enabling and disabling a squelch circuit across AHCI and SATA power states
Publication Date: 2014.04.01 SK HYNIX NAND PRODUCT SOLUTIONS CORP
  • US8686757B2 patent drawing
  • US8686757B2 patent drawing
  • US8686757B2 patent drawing

AI summary

An apparatus and a method are provided for selectively enabling and disabling a squelch circuit in a Serial Advanced Technology Attachment (SATA) host or SATA device while maintaining proper operation of the host and device. An apparatus and method are provided which allow the squelch circuit to be selectively enabled and disabled across SATA power states (PHY Ready, Partial, and Slumber) and in Advanced Host Controller Interface (AHCI) Listen mode.