Satellite Navigation Receiver Acquisition Multiplexing

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Solution Overview

Problem

Existing satellite navigation receivers are too slow in the initial acquisition phase due to the sequential verification of multiple satellite signals and Doppler shifts, which prolongs the time-to-first-fix.

Innovation Solution

The acquisition unit is enhanced with multiplexers to process multiple code replicas and Doppler-shifted versions simultaneously, using shift registers and correlators to compare received signals with multiple code replicas and Doppler-shifted signals, thereby accelerating the acquisition process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If sequential verification of multiple satellite signals and Doppler shifts is used, then device complexity is reduced, but acquisition speed deteriorates

Engineering Contradiction:
Improveacquisition speedVSAvoiddevice complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent segments the acquisition process by dividing the set of satellites into multiple subsets and assigning different code replicas to different subsets. Multiple correlators operate in parallel on different segments simultaneously, transforming a sequential verification process into a parallel one, thereby resolving the contradiction between acquisition speed and device complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new dimension of processing by adding multiple correlators that operate simultaneously on different code replicas and satellite subsets. This dimensional expansion allows parallel processing of multiple signals at once, improving acquisition speed without proportionally increasing overall system complexity through efficient resource sharing.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If multiple correlators process signals in parallel, then acquisition speed is improved, but device complexity increases

Engineering Contradiction:
Improveacquisition throughputVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements multi-functionality by designing correlators that can process multiple code replicas and satellite subsets through configurable input assignments. The same correlator hardware can be dynamically assigned to different satellites and code replicas based on the acquisition phase, allowing parallel processing without proportionally increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent introduces dynamic configurability where the assignment of satellites to subsets and code replicas to correlators can be adjusted during different acquisition phases. This dynamic adaptation allows the system to optimize parallel processing efficiency while managing device complexity through flexible resource allocation rather than fixed hardware configurations.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces the time required for initial signal acquisition, enhancing the speed and efficiency of satellite signal detection and positioning, allowing for faster time-to-first-fix in satellite navigation receivers.

Implementation Method 1

These correlators compute the cross-correlation function between the received satellite signals and a local replica of the PRN code that the receiver is programmed to acquire. The position of the maximum of this cross-correlation function indicates the satellite signal delay.

Methodology Applied
Scientific EffectCross-correlation:

Implementation Method 2

The core of an acquisition unit of the latter type consists of a set of shift registers, a first shift register receiving sample values of an incoming PRN sequence, a second shift register receiving samples of a known PRN replica.

Methodology Applied
Scientific EffectDigital signal processing:

Implementation Method 3

The acquisition unit is enhanced with multiplexers to process multiple code replicas and Doppler-shifted versions simultaneously

Methodology Applied
Scientific EffectSignal multiplexing:

Implementation Method 4

Each satellite transmits one or more carriers modulated with one or more pseudorandom (PRN) codes. The received signal consists of a Doppler-shifted and time-delayed version of that transmitted signal. Because each navigation satellite has a different velocity and is at a different distance from the receiver, the Doppler shift and the time delay is satellite-dependent.

Methodology Applied
Scientific EffectDoppler effect: Doppler Effect

Data Source

PatentEP3417315B1Receiver for satellite navigation
Publication Date: 2023.08.16 SEPTENTRIO
  • EP3417315B1 patent drawingFigure 1~2
  • EP3417315B1 patent drawingFigure 3~4
  • EP3417315B1 patent drawingFigure 5~6

AI summary

The invention is related to a receiver for satellite navigation comprising a signal processor for deriving from a satellite signal a pseudorandom sequence of code chips, a converter for producing a digitized version of the received PRN sequence, a first and second shift register (3, 7), a code generator (4), a set of correlators, circuitry for summing correlation values and circuitry for determining a maximum of the summed correlation, a scheduler (20), characterized in that: • the receiver comprises at least one multiplexer (6, 24), configured to transform multiple PRN sequences into an interleaved sequence and to enter said interleaved sequence into the first or second shift register (3, 7), • the summing circuitry comprises multiple summing circuits (11) for separately summing correlation values related to the multiple PRN sequences, • the circuitry for determining a maximum is configured to determine the maximum in one or more subgroups of sums determined by the multiple summing circuits (11).