Saturated Filter Loop Using Parallel Binary Conversion
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Solution Overview
Problem
Conventional filter loops in digital signal processing systems, such as those used in Voice over IP networks, suffer from decreased processing efficiency due to signal format conversions within the critical signal path, which hinder the handling of increasing data rates and bandwidth demands.
Innovation Solution
Implementing a filter loop with two simultaneous operating cycles that utilize carry-save arithmetic for filtering input signals and converting them to binary form in parallel, thereby reducing the critical path processing time and enhancing throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If signal format conversions are performed within the critical signal path, then the filter loop can process signals correctly, but the processing efficiency significantly decreases
Solution Approach 1:
The patent performs binary conversion of the input signal in advance, before the critical signal path processing begins. By converting the input signal to binary form prior to filtering operations, the system eliminates the need for format conversions during the critical path, thus maintaining both correctness and high processing efficiency
Solution Approach 2:
The patent introduces a time dimension by operating in multiple cycles: the first cycle performs binary conversion, while the second cycle performs filtering operations. This temporal separation allows conversions and filtering to occur in different time dimensions, preventing them from interfering with each other in the critical signal path
2Device complexity
If conventional single-cycle filter loops are used, then the device complexity is lower, but the signal throughput is limited
Solution Approach 1:
The patent segments the filter loop operation into two distinct cycles: a first operating cycle dedicated to binary conversion and a second operating cycle dedicated to filtering operations. This segmentation allows each cycle to specialize in specific tasks, enabling parallel processing of conversion and filtering operations, thereby doubling the signal throughput without significantly increasing overall system complexity
Solution Approach 2:
The patent maintains continuous useful action by overlapping the execution of conversion and filtering operations across two cycles. While the first cycle performs conversion, the second cycle simultaneously performs filtering on previously converted signals, ensuring that both conversion and filtering operations are continuously active, maximizing resource utilization and throughput
Data Source
AI summary
Methods and systems for processing a signal are disclosed herein and may comprise filtering an input signal and a plurality of saturation limit signals to generate a plurality of filtered input signals. A plurality of summed current input signals may be generated by adding the plurality of filtered input signals to a next input signal. While the summed current input signals are being generated, an saturation select signal is simultaneously determined for an output signal based on the input signal. The input signal and the plurality of saturation limit signals may be filtered utilizing infinite impulse response filter and/or finite impulse response filter.