Hardware Save-and-Restore Controller for SoC Power Domain Configuration
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Solution Overview
Problem
Existing SoCs face challenges in efficiently saving and restoring access control configurations across power-down and power-up operations, particularly due to the high cost and inflexibility of retention registers, as well as issues with cross-realm trust and increased latency in power management operations.
Innovation Solution
A hardware-based save-and-restore controller is introduced, which includes a local save-and-restore (L-SAR) controller and a central save-and-restore (C-SAR) controller. The L-SAR controller initiates a save operation by transferring access control configurations to the C-SAR controller, which stores them in a memory within an always-on power domain. During power-up, the C-SAR controller restores these configurations to the IP subsystems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If retention registers are used to maintain access control configurations across power-down and power-up operations, then configuration retention is achieved, but device complexity and cost increase significantly
Solution Approach 1:
The save-and-restore functionality is segmented into separate modules: a save module that captures configuration data before power-down and a restore module that reconstructs configurations after power-up. This segmentation allows the system to achieve reliable configuration retention without requiring complex retention registers throughout the entire SoC, thereby reducing overall device complexity while maintaining reliability.
Solution Approach 2:
An intermediary save-and-restore controller is introduced between the power management system and the IP blocks. This mediator coordinates the save and restore operations, managing the transfer of configuration data to and from non-volatile memory. The intermediary approach eliminates the need for complex retention registers in every IP block while ensuring reliable configuration persistence across power cycles.
2Reliability
If retention registers are used to maintain access control configurations, then configuration retention is achieved, but the solution becomes inflexible beyond a particular stage in the design process
Solution Approach 1:
The save-and-restore mechanism is designed as a dynamic system that can adapt to different IP block configurations and power domain requirements. The controller can identify which IP blocks require save-and-restore operations and manage them accordingly, allowing the system to maintain configuration retention reliability while remaining flexible in accommodating various design configurations and modifications during the design process.
Solution Approach 2:
The save-and-restore controller serves multiple functions: it manages configuration retention for different IP blocks, coordinates save operations before power-down, handles restore operations after power-up, and adapts to varying design requirements. This multi-functional approach provides reliable configuration retention while maintaining design flexibility across different SoC configurations and development stages.
3Reliability
If a save-and-restore mechanism is implemented for all IP blocks, then complete configuration retention is achieved, but power consumption increases due to additional hardware
Solution Approach 1:
Instead of implementing uniform retention registers across all IP blocks, the system applies local quality by selectively enabling save-and-restore functionality only for IP blocks that require configuration retention. The save-and-restore controller identifies and manages only the necessary IP blocks, achieving reliable configuration retention for critical components while minimizing the hardware overhead and associated power consumption across the entire SoC.
Solution Approach 2:
The save-and-restore functionality is extracted from individual IP blocks and consolidated into a centralized controller. This extraction eliminates the need for duplicate retention register hardware in each IP block, reducing overall hardware footprint and power consumption. The centralized controller manages configuration retention efficiently, achieving reliable retention for necessary IP blocks while minimizing the energy required for save-and-restore operations.
Data Source
AI summary
This document describes systems and techniques for a hardware-based save-and-restore controller in an SoC. The described systems and techniques can automatically save and restore access control configurations (e.g., register states) of IP subsystems during a power-down and a power-up sequence, respectively. The save operation is initiated by a local save-and-restore (L SAR) controller and performed by the IP subsystems writing the configuration values to a central save-and-restore (C-SAR) controller before powering down a power domain. The C-SAR controller saves the configuration information in a memory located in an always-on power domain. The described systems and techniques initiate, via the L SAR controller, a restore operation as part of the power-up sequence. In this way, the described systems and techniques provide scalable save-and-restore services, support a large number of power domains, and allow a variable number of access control configurations to be saved and restored.