SAW Filter Wafer-Level Packaging with Low-Temperature Si-Si Bonding

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Solution Overview

Problem

Existing SAW filter technologies face challenges in achieving small size and low cost due to the use of organic dry films that require high-temperature bonding processes, leading to substrate cracking and increased chip size and production costs.

Innovation Solution

A dielectric layer is used to form the sidewalls of the cavity, and a low-temperature Si-Si bonding process is employed to avoid substrate cracking, allowing for wafer-level packaging without thermal annealing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If organic dry films are used for wafer-level packaging, then packaging integrity can be achieved, but substrate cracking occurs due to high-temperature bonding processes

Engineering Contradiction:
Improvepackaging integrityVSAvoidsubstrate cracking
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the bonding temperature parameter from high-temperature (conventional organic dry film process) to low-temperature (silicon wafer bonding process), thereby achieving packaging integrity without causing substrate cracking. This parameter change resolves the contradiction between packaging reliability and substrate damage.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If conventional packaging methods are used, then substrate protection is achieved, but chip size increases and production costs rise

Engineering Contradiction:
Improvesubstrate protectionVSAvoidproduction cost
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent employs a silicon wafer bonding process that eliminates the need for expensive organic dry films and complex thermal annealing equipment. This substitution with a simpler, more cost-effective bonding method reduces production costs while maintaining substrate protection through the bonded cavity structure.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Strength

If high-temperature bonding is applied, then bonding strength is improved, but manufacturing complexity increases due to thermal annealing requirements

Engineering Contradiction:
Improvebonding strengthVSAvoidmanufacturing process complexity
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The patent replaces the thermal field (heat-based bonding) with a mechanical/chemical field approach (low-temperature silicon wafer bonding). This substitution eliminates the need for thermal annealing processes and complex temperature control systems, thereby reducing manufacturing complexity while achieving sufficient bonding strength through the direct silicon-to-silicon bonding mechanism.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the risk of substrate cracking and lowers production costs by enabling smaller SAW filter chips through efficient wafer-level packaging.

Implementation Method 1

a low-temperature Si-Si bonding process is employed to avoid substrate cracking

Methodology Applied
Scientific EffectSi-Si bonding: Chemical Bonding

Data Source

PatentUS12355414B2Surface acoustic wave filter wafer-level packaging structure and method
Publication Date: 2025.07.08 SHENZHEN NEWSONIC TECH CO LTD
  • US12355414B2 patent drawing
  • US12355414B2 patent drawing
  • US12355414B2 patent drawing

AI summary

A fabrication method of a surface acoustic wave (SAW) filter includes obtaining a filter wafer, which includes: obtaining a first substrate; and forming an interdigital transducer (IDT) on the first substrate, the IDT including a first input and output end, a second input and output end, and an interdigital portion. The method further includes: forming a dielectric layer on the filter wafer, the dielectric layer covering the first input and output end and the second input and output end of the IDT, and exposing the interdigital portion; forming a passivation layer on the dielectric layer; forming a bonding layer on the passivation layer; and bonding a second substrate to the filter wafer via the bonding layer, wherein a cavity is enclosed by the second substrate and the bonding layer.