SAW-less LNA with Shunt Notch Filter for RF Interference Rejection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current wireless communication systems, such as WCDMA and LTE, face challenges in achieving low noise, high linearity, and interference rejection due to the high-powered transmit signal distorting the weak desired signal, and the need for external SAW filters and LNAs, which increases cost and complexity, especially in deep sub-um CMOS processes like 40 nm where low supply voltage and high parasitic resistance are limitations.
Innovation Solution
A reconfigurable, multi-band SAW-less radio receiver and transmitter system that uses a current output LNA with a shunt steerable frequency notch filter, adaptable negative conductance circuit, and overdrive monitor to compensate for parasitic resistance and maximize linearity, allowing for on-chip interference rejection without external filters, suitable for 40 nm CMOS technology.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external SAW filters and LNAs are used to achieve low noise and high linearity, then receiver performance is improved, but device complexity and cost increase
Solution Approach 1:
The patent merges the LNA and SAW filter functions into a single integrated circuit block. The LNA incorporates an integrated SAW filter structure that is formed within the same fabrication process, eliminating the need for separate external SAW filters and reducing overall device complexity while maintaining receiver performance.
Solution Approach 2:
The integrated LNA structure serves multiple functions simultaneously: it provides low-noise amplification, implements frequency-selective filtering through the integrated SAW filter, and offers tunability for different frequency bands. This multi-functionality reduces the need for separate dedicated components.
2Productivity
If high-powered transmit signal is used to maximize data capacity and range, then transmitter performance is improved, but receiver linearity deteriorates due to signal distortion
Solution Approach 1:
The SAW filter in the LNA performs preliminary frequency-selective filtering of the received signal before it reaches the rest of the receiver chain. This early filtering action removes out-of-band interferers and reduces the dynamic range requirements for subsequent processing stages, protecting receiver linearity from high-powered transmit signal leakage.
Solution Approach 2:
The integrated SAW filter acts as an intermediary between the antenna and the receiver processing stages. It provides frequency selectivity and interference rejection, mediating the interaction between the high-powered transmit signal and the sensitive receiver circuitry to protect linearity.
3Productivity
If transmit signal power is increased to improve range, then data capacity is improved, but noise on transmit signal appears in desired receiver band
Solution Approach 1:
The SAW filter structure within the LNA performs preliminary frequency-selective filtering at the RF stage, blocking out transmit signal noise and interferers before they can enter the receiver band and corrupt the desired signal. This early action prevents noise from propagating through the receiver chain.
Solution Approach 2:
The integrated SAW filter extracts and removes the harmful transmit signal noise and interferers from the received signal path. By taking out these unwanted components at the frequency-selective filtering stage, the patent protects the desired signal from contamination by transmit signal noise.
4Ease of manufacture
If deep sub-um CMOS process is used to reduce cost and integrate functions, then manufacturing cost is reduced, but parasitic resistance increases
Solution Approach 1:
The patent replaces traditional voltage-mode LNA designs with a current-mode LNA implementation. This substitution of the fundamental operating mode allows for better control of parasitic effects in deep sub-um CMOS processes, as current-mode operation provides inherent immunity to certain types of parasitic resistance and voltage-induced interference.
Solution Approach 2:
The patent employs parameter changes in the LNA design, including adjusted biasing conditions, optimized transistor dimensions, and modified impedance matching networks, to compensate for increased parasitic resistance inherent in deep sub-um CMOS processes while maintaining low-noise performance.
Data Source
AI summary
The invention provides a radio receiver or transceiver having one or more low noise amplifiers corresponding to one or more antenna inputs wherein one or more outputs of the one or more low noise amplifiers is/are combined at a single output current summing node, a tunable, shunt notch filter is coupled or connected to the summed output node that allows for the attenuation of a Tx blocker or interferer, an external blocker or interferer or an internal on-chip interferer.


