Hexagonal Sb-Te Resistive Memory Layer for Low-Power Switching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional resistance change type memory devices, such as phase change memory (PCM) and superlattice type interfacial phase change memory (iPCM), face challenges with high power consumption and complex manufacturing processes, making them inefficient for low power consumption and high-speed operations.
Innovation Solution
A memory device with a resistive layer containing antimony (Sb) and tellurium (Te) as primary elements, along with a group 14 element like germanium (Ge), which has a hexagonal crystal structure and is doped to change resistance values without altering the crystal structure, allowing for low power consumption and high-speed data storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional phase change memory (PCM) or superlattice type interfacial phase change memory (iPCM) is used, then resistance change type memory function is achieved, but power consumption is high
Solution Approach 1:
The patent changes the material composition parameters of the resistive layer by incorporating a group 14 element (such as Ge, Si, Sn, or Pb) into the Sb-Te-based resistive layer. This compositional parameter change modifies the electrical resistance characteristics and phase transition behavior, enabling lower power consumption while maintaining memory functionality. The group 14 element acts as a dopant that optimizes the resistance change ratio and reduces the energy required for phase transitions.
Solution Approach 2:
The patent creates a composite resistive layer by combining Sb-Te alloy with a group 14 element. This composite material structure leverages the beneficial properties of both components: the Sb-Te provides the base phase change functionality while the group 14 element enhances the resistance change characteristics and reduces power consumption. The composite nature allows for optimized memory performance with lower energy requirements compared to conventional pure Sb-Te PCM.
2Ease of manufacture
If conventional PCM or iPCM is used, then resistance change type memory function is achieved, but manufacturing process is complex
Solution Approach 1:
The patent merges the formation of the Sb-Te resistive layer and the group 14 element doping into a single manufacturing step. By incorporating the group 14 element during the initial film deposition process (such as sputtering or molecular beam epitaxy), the patent eliminates the need for separate doping steps, ion implantation, or additional layer stacking required in conventional iPCM manufacturing. This merging of processes simplifies the manufacturing workflow while achieving the desired memory functionality.
3Speed
If conventional PCM or iPCM is used, then resistance change type memory function is achieved, but operation speed is limited
Solution Approach 1:
The patent modifies the physical parameters of the resistive layer by incorporating the group 14 element, which changes the phase transition kinetics and resistance switching speed. The group 14 element dopant reduces the energy barrier for phase transitions and accelerates the crystallization process, enabling faster switching between high and low resistance states. This parameter change allows for high-speed operation with reduced power consumption compared to conventional PCM.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables a resistance change type memory element with reduced power consumption and simplified manufacturing, capable of high-speed operation by changing resistance values through signal-induced distribution changes in the resistive layer, while maintaining the hexagonal crystal structure.
Implementation Method 1
a resistive layer provided between the first electrode and the second electrode, containing at least one of antimony (Sb) and bismuth (Bi) as a first element, and tellurium (Te) as a second element, and having a variable resistance value
Data Source
AI summary
According to one embodiment, a memory device includes a first electrode, a second electrode, and a resistive layer provided between the first electrode and the second electrode, containing at least one of antimony (Sb) and bismuth (Bi) as a first element, and tellurium (Te) as a second element, and having a variable resistance value. The resistive layer includes a first layer having a hexagonal crystal structure containing the first element and the second element. The first layer contains a group 14 element as a third element.