SBFD Downlink Control Scheduling With Redundant FDRA Bit Handling

Solution Overview

Problem

In sub-band full-duplex (SBFD) slots, the frequency domain resource allocation (FDRA) in downlink control information (DCI) includes redundant bits due to varying bandwidth configurations, leading to inefficiencies in decoding and reliability issues.

Innovation Solution

Utilizing redundant bits in the bitmap or resource indicator value (RIV) for known sequences or repetitions to improve decoding efficiency by replacing log likelihood ratios (LLRs) and repeating certain fields in the DCI, ensuring faster and more reliable decoding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If redundant bits are included in FDRA for SBFD slot compatibility, then broader bandwidth configuration support is achieved, but decoding complexity and time increase

Engineering Contradiction:

Improvebandwidth configuration supportVSAvoiddecoding time

Core Design Contradiction:

Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent extracts and removes redundant bits from the FDRA field specifically for SBFD slots. By identifying that certain resource blocks in SBFD slots are inherently reserved or unavailable, the patent eliminates the corresponding bits from the allocation bitmap, reducing the total bit length while maintaining compatibility with broader bandwidth configurations.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies partial action by selectively removing only the redundant bits corresponding to unavailable resource blocks, rather than processing the entire bitmap. This partial removal optimizes decoding by focusing computational effort only on the necessary bits, reducing overall decoding time while preserving adaptability.

Inventive Principle:

Principle #16Partial or excessive action

2Reliability

If full FDRA bitmap is transmitted for all bandwidth parts, then complete resource allocation coverage is achieved, but transmission efficiency decreases

Engineering Contradiction:

Improveresource allocation coverageVSAvoidtransmission efficiency

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent extracts and removes redundant bits from the FDRA field specifically for SBFD slots. By identifying that certain resource blocks in SBFD slots are inherently reserved or unavailable, the patent eliminates the corresponding bits from the allocation bitmap, reducing the total bit length while maintaining compatibility with broader bandwidth configurations.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the parameter of FDRA bit length dynamically based on slot type. For SBFD slots, the bitmap length is adjusted to match the actual available resource blocks, rather than always transmitting the full bitmap for the entire bandwidth part. This parameter optimization improves transmission efficiency while maintaining complete coverage for allocable resources.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS12484066B2Scheduling downlink control information (DCI) in sub-band full-duplex (SBFD) slots

Publication Date: 2025.11.25 QUALCOMM INC

AI summary

A method for wireless communication by a user equipment (UE) includes receiving a configuration of a downlink bandwidth part (BWP). The method also includes receiving a frequency domain resource allocation (FDRA) in a slot. The FDRA includes a first type of bits corresponding to a downlink allocation within the downlink BWP and a second type of bits corresponding to either a known sequence or repeated bits. The method further includes communicating in accordance with the FDRA.