SBFET MIS Contact Structure for Interface Position Control
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Solution Overview
Problem
The manufacturing process of Schottky barrier field-effect transistors faces challenges in controlling the position and thickness of the lateral insulator, leading to dispersion in transistor performance and limited composition options, which affects the current density and leakage current in 'on' and 'off' states, respectively.
Innovation Solution
A process involving a metal/insulator/semiconductor (MIS) contact is used, where an insulating material separates the metal conduction electrode from the semiconductor channel, preventing diffusion and allowing precise control of the contact position, even during heating steps, thereby optimizing carrier injection and reducing resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If heating steps are implemented after metallizing the source or drain, then annealing or interconnection formation is achieved, but the position of the interface between the source and channel moves under the gate due to silicidation reaction
Solution Approach 1:
A thin insulating layer is introduced as an intermediary between the metal source electrode and the silicon channel. This insulator prevents direct contact between the metal and silicon during heating steps, thereby preventing silicidation reaction and interface migration while still allowing electrical contact through tunneling or thermal excitation.
2Ease of manufacture
If isotropic etching is used to hollow out silicon under gate spacers, then lateral insulator formation is enabled, but positioning and thickness control are poor leading to high dispersion
Solution Approach 1:
The mechanical isotropic etching process is replaced with a chemical deposition process (oxidation or nitridation) that forms the lateral insulator through chemical reaction on the silicon surface, providing better control over insulator thickness and position through chemical means rather than physical removal.
3Device complexity
If oxidation or nitridation is used to form the lateral insulator, then insulator composition is limited, but manufacturing complexity is reduced
Solution Approach 1:
The oxidation or nitridation process serves multiple functions: it forms the lateral insulator, provides surface passivation, and creates a controlled interface structure. This multi-functionality reduces the need for additional process steps while maintaining manufacturing simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures precise control over the contact position and thickness of the insulator, minimizing parasitic capacitances and enhancing the transistor's performance by reducing resistance in the 'on' state and controlling leakage current, thus improving the manufacturing consistency and efficiency of both nFET and pFET transistors.
Implementation Method 1
an insulating material separates the metal conduction electrode from the semiconductor channel, preventing diffusion
Implementation Method 2
all heating steps lead to a silicidation reaction occurring between the metal of the source and the silicon of the channel, forming an intermetallic compound
Data Source
AI summary
A process for manufacturing a Schottky barrier field-effect transistor is provided. The process includes: providing a structure including a control gate and a semiconductive layer positioned under the gate and having protrusions that protrude laterally with respect to the gate; anisotropically etching at least one of the protrusions by using the control gate as a mask, so as to form a recess in this protrusion, this recess defining a lateral face of the semiconductive layer; depositing a layer of insulator on the lateral face of the semiconductive layer; and depositing a metal in the recess on the layer of insulator so as to form a contact of metal/insulator/semiconductor type between the deposit of metal and the lateral face of the semiconductive layer.