S-Box Logic Gate Arrays for Constant Current Cryptography
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Solution Overview
Problem
Hardware encryption/decryption devices, such as those using the Data Encryption Standard (DES) algorithm, face challenges in protecting the substitution box (S-Box) from hacker exposure, leading to potential leakage of secret information during encryption operations.
Innovation Solution
A cryptographic device is designed with arrays of logic gates that ensure only one active bit is output from each stage, maintaining constant power consumption and implementing a many-to-one correspondence for input and output signals, thereby protecting against attacks like differential power analysis and electromagnetic detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If an S-Box is designed using a lookup table in hardware, then the substitution operation can be performed efficiently, but the internal data may be exposed to hackers
Solution Approach 1:
The S-Box implementation is segmented into multiple logic gate stages (first logic gates receiving 2 bits, second logic gates receiving intermediate bits, third logic gates receiving final intermediate bits) rather than using a single lookup table. This segmentation prevents hackers from directly accessing the internal data structure while maintaining the substitution functionality through distributed logical operations.
Solution Approach 2:
The patent introduces intermediate logic gate stages that act as mediators between the input and output of the S-Box. These intermediate stages (first, second, and third logic gates with specific bit transformations) obscure the direct relationship between input and output data, preventing differential power analysis and electromagnetic detection attacks while still producing the correct substitution output.
2Reliability
If hardware encryption devices use traditional S-Box design, then encryption can be performed, but differential power analysis and electromagnetic detection attacks can leak secret information
Solution Approach 1:
The patent changes the operational parameters of the S-Box by ensuring that each logic gate stage outputs a constant number of active bits (first logic gates output bits with one active bit, second logic gates output bits with one active bit, third logic gates output bits with one active bit). This constant parameter behavior prevents power analysis attacks that rely on detecting variations in power consumption based on the number of active bits, while still maintaining correct encryption functionality.
3Device complexity
If a lookup table is used for S-Box implementation, then the design is simple, but the internal data structure is vulnerable to exposure
Solution Approach 1:
The patent replaces the mechanical lookup table structure with a logical gate-based system. Instead of using a direct memory access structure that physically exposes the data table, the invention uses sequences of logical operations (AND, OR, NOT gates arranged in specific patterns) to compute the substitution result. This substitution of the implementation mechanism eliminates the physical exposure of internal data while maintaining the same cryptographic function.
Data Source
AI summary
Provided is a cryptographic device implementing an S-Box of an encryption algorithm using a many-to-one binary function. The cryptographic device includes: arrays of first logic gates including I first logic gates which each receive 2 bits of an input signal; 2N second logic gates which each receive corresponding J bits from among I bits output from the arrays of the first logic gates; and L third logic gates which each receive K bits from among 2N bits output from the second logic gates, wherein there is a many-to-one correspondence between the N bits of the input signal and the K bits input to each of the third logic gates, and wherein the N, I, J, K, and L are positive integers. Because a signal output from each array includes only one active bit, current is always consumed constantly to prevent internal data from leaking out to a hacker.