Switched-Capacitor Integrator Timing for Flicker Noise Rejection

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Solution Overview

Problem

Switched-capacitor integrators, particularly double-sampling SC integrators, face challenges in effectively rejecting flicker noise across a wide range of signal frequencies, which degrades their performance and increases noise levels, especially at lower signal frequencies.

Innovation Solution

The implementation of a double-sampling SC integrator with a switching arrangement that accumulates charges on sampling capacitors and integrates them into an integrating capacitor, while adding sign-inverted samples of amplifier flicker noise at every clock cycle, maintaining a consistent time difference between these samples independent of the master clock frequency, thereby enhancing flicker noise rejection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional double-sampling SC integrators are used, then the circuit can operate at various clock frequencies, but flicker noise rejection deteriorates at lower signal frequencies

Engineering Contradiction:

Improveoperating frequency rangeVSAvoidflicker noise

Core Design Contradiction:

Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies periodic action by using a chopper circuit that periodically switches between connecting the integrator output to the inverter input and connecting the noise sampling capacitor to the inverter input. This periodic switching at a frequency higher than the signal frequency allows the circuit to reject flicker noise while maintaining adaptability across various operating frequencies. The periodic modulation of the noise sampling process enables effective noise rejection without sacrificing frequency range versatility.

Inventive Principle:

Principle #19Periodic action

Solution Approach 2:

The patent introduces an intermediary noise sampling capacitor that specifically captures flicker noise from the amplifier, separating it from the signal path. This intermediary component allows the noise to be sampled and processed independently, then subtracted from the main signal path, thereby improving flicker noise rejection without affecting the integrator's ability to operate at different frequencies.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Device complexity

If the time difference between flicker noise samples is made dependent on master clock frequency, then the circuit simplifies, but flicker noise rejection worsens across wide frequency ranges

Engineering Contradiction:

Improvetiming control circuitVSAvoidflicker noise rejection

Core Design Contradiction:

Device complexityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary anti-action by proactively compensating for the potential degradation of flicker noise rejection. The chopper circuit is designed to maintain a consistent time difference between noise samples regardless of master clock frequency variations, preemptively preventing noise rejection deterioration before it occurs. This approach avoids the need for complex adaptive timing control while ensuring consistent noise performance across all operating frequencies.

Inventive Principle:

Principle #9Preliminary anti-action

Solution Approach 2:

The patent changes the parameter of time difference between noise samples from being clock-frequency-dependent to being constant. By fixing this time interval through the chopper circuit's periodic operation, the system maintains optimal flicker noise rejection characteristics across a wide range of operating frequencies without requiring complex adaptive timing mechanisms, thus resolving the contradiction between device complexity and noise rejection performance.

Inventive Principle:

Principle #35Parameter changes

3Use of energy by moving object

If narrow-bandwidth signals are processed, then power consumption reduces, but susceptibility to flicker noise increases

Engineering Contradiction:

Improvepower consumptionVSAvoidflicker noise susceptibility

Core Design Contradiction:

Use of energy by moving objectVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an intermediary noise sampling path that specifically targets flicker noise without affecting the main signal processing path. The noise sampling capacitor and associated switching circuitry act as intermediaries that capture and process only the noise component, allowing narrow-bandwidth signals to be processed with low power consumption while the intermediary noise path actively rejects flicker noise through periodic sampling and subtraction.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent extracts flicker noise from the signal path by using a dedicated noise sampling capacitor that captures only the noise component through the chopper circuit's periodic switching. This extracted noise is then subtracted from the main signal path, allowing narrow-bandwidth signals to maintain low power consumption while the extracted noise component is actively rejected, resolving the contradiction between power efficiency and noise susceptibility.

Inventive Principle:

Principle #2Taking out (Extraction)

Data Source

PatentUS12073269B2Switched-capacitor integrators with improved flicker noise rejection

Publication Date: 2024.08.27 ANALOG DEVICES INT UNLTD CO

AI summary

An example SC integrator can include first and second sampling capacitors, an amplifier, an integrating capacitor, coupled at least to an output of the amplifier, and a switching arrangement. The SC integrator can be configured for adding (i.e., integrating in the integrating capacitor) sign-inverted samples of a flicker noise of the amplifier at one or more cycles of a master clock and can be configured for keeping the time distance/delay between those samples relatively small across a range of master clock frequencies.