Scalable Dependency Matrix with Summary Bits for Out-of-Order Processors

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Solution Overview

Problem

As the number of instructions in issue queues of out-of-order processors increases, the size of dependency matrices grows exponentially, leading to space and power consumption issues, as well as potential timing impacts, due to the need for precise tracking of dependencies between all instructions.

Innovation Solution

Implementing a scalable dependency matrix with multiple summary bits in the issue queue, where dependencies within a close timeframe are tracked individually, and those outside this timeframe are grouped using summary bits, allowing for a reduced matrix size and storage efficiency by utilizing a trapezoidal structure and eliminating the need for an age array.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the number of instructions in issue queues increases, then processing capability is improved, but space and power consumption increase due to larger dependency matrices

Engineering Contradiction:
Improveprocessing capabilityVSAvoidspace consumption
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The dependency matrix is segmented into multiple groups, with each group tracked by a summary bit. Instead of tracking every individual instruction dependency, the patent divides instructions into groups (e.g., recent instructions vs. older instructions) and uses summary bits to represent dependency status for each group, significantly reducing the number of bits required in the dependency matrix.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent tracks dependencies partially by using summary bits that indicate whether any instruction in a group has a dependency, rather than tracking each individual dependency. This partial tracking approach is sufficient for correct instruction issuance while dramatically reducing space requirements.

Inventive Principle:
Principle #16Partial or excessive action

2Productivity

If the number of instructions in issue queues increases, then processing capability is improved, but power consumption increases due to larger dependency matrices

Engineering Contradiction:
Improveprocessing capabilityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by stationary object

Solution Approach 1:

The dependency matrix is segmented into multiple groups, with each group tracked by a summary bit. Instead of tracking every individual instruction dependency, the patent divides instructions into groups (e.g., recent instructions vs. older instructions) and uses summary bits to represent dependency status for each group, significantly reducing the number of bits required in the dependency matrix.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent tracks dependencies partially by using summary bits that indicate whether any instruction in a group has a dependency, rather than tracking each individual dependency. This partial tracking approach is sufficient for correct instruction issuance while dramatically reducing space requirements.

Inventive Principle:
Principle #16Partial or excessive action

3Measurement precision

If individual dependency tracking is implemented for all instructions, then dependency accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvedependency tracking accuracyVSAvoidmatrix size
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The dependency matrix is segmented into multiple groups, with each group tracked by a summary bit. Instead of tracking every individual instruction dependency, the patent divides instructions into groups (e.g., recent instructions vs. older instructions) and uses summary bits to represent dependency status for each group, significantly reducing the number of bits required in the dependency matrix.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent tracks dependencies partially by using summary bits that indicate whether any instruction in a group has a dependency, rather than tracking each individual dependency. This partial tracking approach is sufficient for correct instruction issuance while dramatically reducing space requirements.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS10564976B2Scalable dependency matrix with multiple summary bits in an out-of-order processor
Publication Date: 2020.02.18 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10564976B2 patent drawing
  • US10564976B2 patent drawing
  • US10564976B2 patent drawing

AI summary

Aspects of the invention include tracking dependencies between instructions in an issue queue. The tracking includes, for each instruction in the issue queue, identifying whether the instruction is dependent on each of a threshold number of instructions added to the issue queue prior to the instruction. The tracking also includes identifying whether the instruction is dependent on one or more other instructions added to the issue queue prior to the instruction that are not included in the each of the threshold number of instructions. A dependency between the instruction and each of the other instructions is tracked as a plurality of groups by indicating that a dependency exists between the instruction and one of the groups based on identifying a dependency between the instruction and at least one instruction in the group. Instructions are issued from the issue queue based at least in part on the tracking.