Scalable Hardware Interface Board for Network Emulator Testing
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Solution Overview
Problem
Current solutions for connecting hardware emulators to networks are not scalable and cost-effective, particularly when dealing with high-port requirements for network switch and router designs, as they often necessitate multiple computers and may struggle with bandwidth from multiple active network ports.
Innovation Solution
A hardware interface board is introduced between the network and the emulator, allowing for scalable connectivity using multiple network chip sets and enabling operation in both live test and direct test modes, with the ability to modify packet formats to simulate different data transfer speeds, all controlled via a single computer port.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple computers are used to connect hardware emulator to network, then network port capacity is increased, but system complexity and cost increase
Solution Approach 1:
The patent combines multiple network interface card functions into a single hardware interface board that can be connected to one computer. This single board integrates multiple network chip sets and provides multiple network ports, eliminating the need for multiple separate computers while maintaining network port capacity.
Solution Approach 2:
The hardware interface board is designed with multi-functionality to perform both network interface functions and emulator control functions. It can operate in multiple modes (live test mode and direct test mode) and handles various packet formats, making it a universal solution that replaces multiple specialized devices.
2Power
If multiple computers are used to provide network connectivity, then bandwidth capacity is increased, but cost and resource requirements increase
Solution Approach 1:
The patent merges the functionality of multiple computers into a single hardware interface board that provides equivalent or superior bandwidth capacity. The board includes multiple network chip sets that can handle multiple active network ports simultaneously, providing the necessary bandwidth without requiring multiple separate computer systems.
3Reliability
If emulator operates at slower speed than network, then emulation accuracy is maintained, but data transfer bottleneck occurs
Solution Approach 1:
The hardware interface board performs preliminary actions by pre-processing and buffering data packets before they reach the emulator. It can modify packet formats to match emulator speed requirements and pre-adjust data rates, preventing bottlenecks before they occur while maintaining emulation accuracy.
Solution Approach 2:
The patent employs parameter changes by dynamically adjusting packet formats and data transfer rates at the hardware interface board. It can transform network-speed packets into emulator-appropriate formats, changing the speed parameter to match the emulator's processing capability while maintaining data integrity and emulation accuracy.
Data Source
AI summary
A disclosed interface between an emulator and a network that is readily scalable. In one aspect, a scalable solution is achieved through a hardware interface board positioned between the network and the emulator to allow proper transfer there between. A computer is separated from and coupled to the hardware interface board and provides the necessary control signals. Because it is done in hardware separated from the computer, the interface board is readily scalable through the simple addition of network chip sets. In another aspect, the interface board can be placed in two modes of operation, a live test mode and a direct test mode. In yet another aspect, packet formats may be changed on the interface board so that it appears to the emulator as if the network is operating at a different data transfer speed than is actually the case.