Compiler Data Prefetching for Scalar Loops via Linear Induction Expressions
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Solution Overview
Problem
Existing data prefetching techniques are inefficient for non-vectorizable loops and require complex analysis, leading to increased compilation time and reduced performance due to the inability to effectively handle scalar loops and indirect memory accesses.
Innovation Solution
The use of induction tables to determine potential prefetch candidates and eliminate redundant cache line fetching, allowing for efficient data prefetching in scalar loops and indirect memory accesses by generating prefetch instructions based on linear expressions of induction variables during compile time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If complex analysis techniques are used for data prefetching, then prefetching accuracy may be improved, but compilation time increases
Solution Approach 1:
The patent extracts the essential information needed for prefetching from the induction table, specifically the linear induction expressions and their associated memory access patterns. By taking out only the critical components (induction variables, base addresses, strides) rather than performing complete complex analysis, the system achieves sufficient prefetching accuracy without the time cost of exhaustive analysis.
Solution Approach 2:
The patent performs preliminary computation of prefetch addresses during the compilation phase using the induction expressions. By pre-calculating the memory addresses that will be needed based on the linear induction patterns, the system prepares data for prefetching without requiring complex runtime analysis, thus reducing compilation time while maintaining accuracy.
2Productivity
If conventional prefetching techniques are applied to scalar loops, then some prefetching can be achieved, but performance is reduced due to inability to handle indirect accesses
Solution Approach 1:
The patent makes the prefetching mechanism universal by handling both direct and indirect memory accesses through a unified approach. The induction table framework accommodates various access patterns (direct array accesses, indirect accesses through pointers or complex expressions) using the same linear induction expression analysis, enabling reliable prefetching across different loop types without sacrificing performance.
Solution Approach 2:
The patent changes the approach from fixed conventional prefetching patterns to parameterized linear induction expressions. By representing memory accesses as linear functions of induction variables (address = base + coefficient*iteration), the system can adapt to different access patterns including indirect accesses, maintaining both productivity and reliability through flexible parameter adjustment.
3Reliability
If redundant cache line fetching is performed, then data availability is ensured, but memory bandwidth is wasted
Solution Approach 1:
The patent applies partial action by fetching only the necessary cache lines based on the precise linear induction expressions. Instead of excessive prefetching that guarantees data availability through over-fetching, the system calculates the exact prefetch addresses and distances needed, achieving sufficient data availability while minimizing memory bandwidth consumption by avoiding redundant cache line fetches.
Data Source
AI summary
An efficient and effective compiler data prefetching technique is disclosed in which memory accesses may be prefetched are represented in linear induction expressions. Furthermore, indirect memory accesses indexed by other memory accesses of linear induction expressions in scalar loops may be prefetched.