Scaled DAC Current Cell Calibration Without ADC Offset Errors
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Solution Overview
Problem
Existing digital to analog converter (DAC) technologies face challenges in accurately calibrating all current cells, particularly in binary and segmented architectures, due to input offset errors from measurement ADCs, leading to inaccuracies and sensitivity to manufacturing tolerances.
Innovation Solution
A self-calibrating DAC architecture that utilizes programmable current cells, temporary current cells, and calibration logic to form replica current cells, adjusting their magnitudes to be equal, thereby calibrating all current cells independently of measurement ADCs, reducing input offset errors and improving accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional self-calibrating design approach is used with individual calibrating DACs and measurement ADCs, then calibration accuracy is improved, but input offset errors from measurement ADCs adversely affect the calibration accuracy
Solution Approach 1:
The patent extracts and eliminates the measurement ADC component from the calibration system. Instead of using a measurement ADC to sense current differences (which introduces input offset errors), the invention uses a current comparator that directly compares currents without conversion, thereby removing the harmful measurement ADC offset errors from the calibration process.
Solution Approach 2:
The patent substitutes the electronic measurement ADC system with a direct current comparison mechanism. The current comparator provides a more direct and accurate method of sensing current differences without the intermediate digital conversion step that introduces offset errors, replacing the ADC-based measurement system with a pure analog current comparison approach.
2Manufacturing precision
If intrinsic DAC design approach with large analog devices is used, then static error is reduced to acceptable levels, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent segments the calibration process into discrete steps involving individual current cell calibration. Rather than requiring large analog devices for intrinsic error reduction, the invention divides the DAC into individually calibratable current cells that can be adjusted separately, reducing the need for oversized analog components while achieving comparable static error performance.
Solution Approach 2:
The patent applies preliminary calibration actions to each current cell before the DAC is deployed. By pre-calibrating individual current cells using the current comparator and control logic, the system achieves low static error without requiring inherently more precise (and larger) analog devices, thereby reducing device complexity.
3Productivity
If conventional calibration techniques are used, then some current cells are calibrated, but not all current cells can be calibrated accurately due to ADC input offsets
Solution Approach 1:
The patent implements a self-service calibration system where the current comparator and control logic work together to automatically calibrate all current cells without external intervention. The system uses the uncalibrated current cells themselves as references for calibration, enabling complete coverage of all current cells while maintaining accuracy through the offset-free current comparison mechanism.
Solution Approach 2:
The patent incorporates feedback through the current comparator that continuously monitors current differences and provides information to the control logic. This feedback mechanism enables iterative adjustment of current cell values until all cells are accurately calibrated, achieving both complete calibration coverage and high precision by eliminating ADC offset errors from the feedback path.
4Ease of operation
If measurement ADCs are used for sensing current differences, then calibration can be performed, but the system becomes sensitive to manufacturing tolerances and input offset errors
Solution Approach 1:
The patent extracts the measurement ADC from the calibration system and replaces it with a current comparator. This removal eliminates the source of input offset errors and reduces sensitivity to manufacturing tolerances in the measurement path, while maintaining calibration capability through direct analog current comparison.
Solution Approach 2:
The patent changes the measurement parameter from digital voltage (after ADC conversion) to direct analog current comparison. By operating in the current domain throughout the calibration process without digital conversion, the system maintains better linearity and reduces sensitivity to manufacturing variations in the measurement path.
Data Source
AI summary
A method and apparatus for the calibration of current cells, whereby a current signal from each current cell may be generated by either a thermometer current cell, or a binary current cell. If generated by a binary current cell, then two or more replica binary current cells exist to form a group of binary current cells within two or more binary current cell sets. The current magnitude generated by each replica current cell of each binary current cell group is first calibrated to be substantially equal to each other. Next, the combined current generated by the replica current cell group is calibrated to be substantially equal to a magnitude of a temporary current signal, or a portion thereof. Subsequent less-significant binary current cell groups are similarly calibrated to the temporary current signal through the use of the previously calibrated, more-significant binary current cell groups.