Σ-CAM Error Correction Using Redundancy Columns On Access
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Solution Overview
Problem
Existing error detection and correction methodologies for summing content-addressable memory (Σ-CAM) disrupt computational tasks and are inefficient in terms of processing resources and time, necessitating the development of an on-access error correction methodology.
Innovation Solution
Adapting an error-correction methodology for Σ-CAMs by leveraging vector-matrix multipliers, adding redundancy columns to store a modified linear code, and using processing resources to compute redundancy values for error detection and correction during computational tasks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing error detection and correction methodologies are used for Σ-CAM, then error detection and correction capability is achieved, but computational tasks are disrupted and processing efficiency deteriorates
Solution Approach 1:
The patent merges error detection and correction functionality with the normal computational operations of the Σ-CAM. By integrating error correction codes into the data storage and retrieval process itself, the system achieves both reliability and productivity simultaneously without separate error handling routines that would disrupt computation.
Solution Approach 2:
The patent applies preliminary action by pre-computing and storing error correction codes along with the data in the Σ-CAM. When data is retrieved, the error correction is already prepared and can be applied immediately without disrupting the computational flow, thus maintaining both reliability and productivity.
2Reliability
If existing error detection and correction methodologies are used for Σ-CAM, then error detection and correction capability is achieved, but processing resource consumption increases
Solution Approach 1:
The patent combines error correction operations with the existing computational operations of the Σ-CAM. By utilizing the same computational resources already allocated for data processing, the system achieves error detection and correction without requiring additional processing resources, thus improving reliability without increasing energy consumption.
3Reliability
If existing error detection and correction methodologies are used for Σ-CAM, then error detection and correction capability is achieved, but time consumption increases
Solution Approach 1:
The patent performs preliminary action by pre-computing and storing error correction codes with the data in the Σ-CAM. During data retrieval, the error correction is already prepared and can be applied immediately in parallel with data processing, eliminating the need for sequential error checking that would cause time delays.
Solution Approach 2:
The patent maintains continuity of useful action by integrating error correction into the ongoing computational tasks. Rather than pausing computation to perform error checking, the system continues computational operations while simultaneously applying error correction, thus achieving reliability without time loss.
Data Source
AI summary
Examples of the presently disclosed technology provide a methodology for detecting and correcting errors in a summing content-addressable memory (Σ-CAM) while the Σ-CAM is performing a computational task (i.e., “on-access” error correction). The methodology involves adding redundancy columns to a Σ-CAM used to store a task-driven matrix (i.e., a matrix having values comporting with a computational task). Examples can leverage an encoder to compute redundancy values for the redundancy columns such that the Σ-CAM stores a codeword of a linear code (C) in each row. Examples also modify the linear code (C) used to compute redundancy values. Namely, examples modify the linear code (C) so that it includes the all-one vector. With this modification, a system of the presently disclosed technology can detect and correct errors in an output vector from a Σ-CAM based on this modified/particularized linear code (C).