Scan Cell Architecture for Test Coverage and Time Reduction

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Solution Overview

Problem

Scan-based testing techniques are inefficient due to the majority of test time being spent on shifting test data, with low fault coverage and high test application times, which is problematic for automotive electronics requiring stringent reliability and compliance with standards like ISO 26262.

Innovation Solution

The introduction of scan cells capable of operating in additional modes, including shift-observation and capture-accumulation modes, which allow for more efficient test data processing and reduced test application time through the use of selection and combination circuitry, such as XOR gates and multiplexers, to form observation scan chains.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If scan-based testing is used to achieve high controllability and observability, then test coverage is improved, but test application time increases significantly

Engineering Contradiction:
Improvetest coverageVSAvoidtest application time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the traditional single-mode scan cell into multiple operational modes (shift mode, capture mode, and observation mode). By dividing the testing process into distinct phases with different cell behaviors, the system achieves both high fault coverage through comprehensive scanning and reduced test time through efficient observation mode operation where cells can be tested in parallel without full serial shifting.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The scan cell architecture is made dynamic by enabling cells to switch between different operational modes (shift, capture, observation) based on test requirements. This dynamic reconfiguration allows the testing system to adapt its behavior during different phases of test application, optimizing both coverage and time efficiency by using observation mode for rapid fault detection without complete serial shifting.

Inventive Principle:
Principle #15Dynamics

2Productivity

If pseudorandom test patterns are applied in test-per-clock fashion to reduce test time, then productivity is improved, but test coverage may be compromised

Engineering Contradiction:
Improvetest application speedVSAvoidfault coverage
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent merges deterministic scan-based testing with pseudorandom observation testing into a unified architecture. The scan cells maintain deterministic shift and capture capabilities for guaranteed fault coverage, while simultaneously supporting pseudorandom observation mode that enables rapid test-per-clock operation. This combination allows the system to achieve both high productivity through pseudorandom testing and reliable fault coverage through deterministic scan mechanisms.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10963612B2Scan cell architecture for improving test coverage and reducing test application time
Publication Date: 2021.03.30 SIEMENS INDUSTRY SOFTWARE INC
  • US10963612B2 patent drawing
  • US10963612B2 patent drawing
  • US10963612B2 patent drawing

AI summary

A scan cell comprises: a state element and selection and combination circuitry. The selection and combination circuitry comprises first combination circuitry configured to combine a signal from a scan input of the scan cell with a signal from a functional circuit input of the scan cell to generate a first signal, second combination circuitry configured to combine the signal from the functional circuit input of the scan cell with an output signal of the state element to generate a second signal, and selection circuitry configured to select an input signal for the state element from the signal from the scan input of the scan cell, the signal from the functional circuit input of the scan cell, the first signal, and the second signal based on two selection input signals of the scan cell.