Fault Location Estimation for Scan Chain FF Ranges

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Solution Overview

Problem

Existing fault location estimation devices struggle with accurately diagnosing undefined and permanent faults in scan chains, often requiring extensive fault simulation and failing to narrow down faulty scan FF ranges efficiently, leading to prolonged diagnosis times and inaccurate fault location identification.

Innovation Solution

A fault location estimation device that includes a faulty scan chain identification unit, a faulty scan FF narrowing unit, and a path trace narrowing unit, which uses logic circuit configuration information and failure-observed scan FF data to trace back failure-propagation paths and narrow down faulty scan FF ranges, while considering signal line branches to distinguish between fault candidates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If fault simulation is performed extensively to diagnose undefined and permanent faults in scan chains, then measurement precision of fault location is improved, but loss of time increases due to prolonged diagnosis times

Engineering Contradiction:
Improvefault location identification accuracyVSAvoiddiagnosis time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent divides the scan chain into multiple segments based on the positions of failure-observed scan FFs. By segmenting the fault diagnosis process into different ranges (first range before the failure-observed scan FF, second range after it), the system can apply different analysis methods to each segment, reducing the overall computation time while maintaining diagnostic accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary actions by first identifying failure-observed scan FFs through scan chain operation verification tests before conducting extensive fault simulation. This preliminary identification allows the system to narrow down the search space and focus subsequent fault simulation only on relevant segments, significantly reducing diagnosis time while preserving measurement precision.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If fault simulation is performed extensively to diagnose undefined and permanent faults in scan chains, then manufacturing precision of fault range identification is improved, but productivity decreases due to reduced diagnosis efficiency

Engineering Contradiction:
Improvefault range identification precisionVSAvoiddiagnosis efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent segments the fault diagnosis process into multiple stages: first identifying failure-observed scan FFs, then dividing the scan chain into different ranges, and finally performing fault simulation only on relevant segments. This segmentation maintains manufacturing precision by thoroughly analyzing each segment while improving productivity by avoiding unnecessary simulations on unaffected areas.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by performing fault simulation only on specific segments of the scan chain rather than the entire chain. By focusing computational resources on the first range (before failure-observed scan FF) and second range (after failure-observed scan FF) separately, the system achieves sufficient diagnostic precision without the excessive computation time required for exhaustive full-chain simulation.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If the faulty scan FF range is not narrowed down efficiently, then reliability of fault diagnosis is improved by considering all possibilities, but loss of time increases due to extended analysis duration

Engineering Contradiction:
Improvefault diagnosis reliabilityVSAvoidanalysis duration
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary identification of failure-observed scan FFs using scan chain operation verification tests before conducting fault simulation. This preliminary action maintains reliability by ensuring all failure points are identified, while simultaneously reducing analysis duration by establishing clear boundaries for subsequent segmented analysis.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments the analysis into distinct ranges based on failure-observed scan FF positions, allowing reliable diagnosis of each segment independently. This segmentation maintains comprehensive coverage (reliability) while reducing overall analysis time by parallelizing or sequentially prioritizing segment analysis rather than treating the entire chain as a single unit.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8356218B2Fault location estimation device, fault location estimation method, and program
Publication Date: 2013.01.15 RENESAS ELECTRONICS CORP
  • US8356218B2 patent drawing
  • US8356218B2 patent drawing
  • US8356218B2 patent drawing

AI summary

A fault location estimation device includes: a faulty scan chain identification unit that identifies a faulty scan chain and its fault type based on result of operation verification test; a faulty scan FF narrowing unit that compares test result of the faulty scan chain with simulation result for determining a faulty scan FF range beginning at the location of a scan FF where both results differ; and a path trace narrowing unit that references logic circuit configuration information, signal line expected value, a failure-observed scan FF, and test result of a defective circuit to extract a scan FF on the faulty scan chain, which may be reached from a failure-observed scan FF observed on a normal scan chain by tracing back a failure propagation path while performing implication procedure for an input side, and thereby further narrows the faulty scan FF range determined by the faulty scan FF narrowing unit.