Scan Chain Mapping Module for IC Debugging
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Solution Overview
Problem
In integrated circuit testing, not all registers are accessible by the central processing unit, limiting the ability to debug functional issues, especially when internal state machines or counter values are not CPU accessible.
Innovation Solution
A testing system that includes a mapping module to store information mapping register values to their functional meanings, allowing input signals to be propagated through a scan chain to extract values from all registers, including those not accessible by the processor, and correlating these values to their hierarchical positions within the integrated circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Difficulty of detecting and measuring
If scan chain is used to access all registers, then debugging capability is improved, but device complexity increases due to additional mapping module and scan chain infrastructure
Solution Approach 1:
The system segments the debugging process by separating the scan chain infrastructure from the mapping functionality. The mapping module creates a correspondence between scan chain positions and functional register names, allowing complex debugging information to be presented in a simplified, organized manner that improves detectability without proportionally increasing overall system complexity.
Solution Approach 2:
The mapping module acts as an intermediary between the scan chain output and the debugger. It translates raw scan chain position data into meaningful functional register identifiers, enabling comprehensive debugging capability while keeping the interface to the debugger simple and manageable, thus resolving the contradiction between debugging power and perceived complexity.
2Loss of information
If all register values are extracted through scan chain, then information completeness is improved, but loss of time increases due to sequential shifting through all registers
Solution Approach 1:
The mapping module performs preliminary organization of register position-to-function relationships before debugging sessions. This pre-established mapping allows the debugger to quickly translate and present relevant information without requiring sequential examination of all scan chain positions during actual debugging, thus reducing the time penalty while maintaining complete information access.
Solution Approach 2:
The system implements feedback through the mapping module that allows the debugger to efficiently navigate and retrieve specific register values based on functional names rather than requiring linear progression through all scan chain elements. This feedback mechanism optimizes the retrieval process by allowing targeted access to specific registers of interest.
Data Source
AI summary
Testing systems and method of testing an integrated circuit are provided. A testing system comprises an input terminal, multiple circuit elements, each having a register, and an output terminal forming a scan chain through which an input signal is propagated. The testing system further comprises a debugger that includes a mapping module that stores information mapping register values to their respective functional meanings. The input signal is applied to extract all values of all of the registers whether or not accessible by a processor.