Masking Logic for Scan Chain Test Output Integrity
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Solution Overview
Problem
Indeterminate states in scan outputs during circuit testing can cause signature generators to enter invalid states, rendering scan chain signatures meaningless, and existing solutions that avoid signature generators deny the benefits of signature analysis.
Innovation Solution
An on-chip test controller with masking logic circuitry forces indeterminate test output states to a known state, preventing them from propagating to the signature generator, and a memory-based system specifies which inputs to mask in each cycle, allowing valid signature generation despite indeterminate states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If signature analysis is used to compress and analyze scan chain outputs, then data analysis efficiency is improved, but the system becomes vulnerable to indeterminate states that can invalidate the signature
Solution Approach 1:
The patent introduces an intermediary component (masking logic circuitry) between the scan chain outputs and the signature generator. This intermediary masks indeterminate states before they reach the signature generator, allowing the signature analysis system to remain valid even when indeterminate states are present in the scan outputs.
Solution Approach 2:
The patent converts the harmful effect of indeterminate states into a manageable condition by introducing mask data that selectively masks only the affected outputs. This allows the signature generator to continue operating with valid data, transforming a potentially invalidating condition into a controlled masking operation.
2Reliability
If indeterminate states are masked to maintain signature validity, then signature reliability is improved, but additional masking logic circuitry is required
Solution Approach 1:
The patent applies preliminary action by pre-determining which scan chain outputs may contain indeterminate states and preparing corresponding mask data in advance. The mask data is generated based on knowledge of which logic elements are uninitialized or may produce indeterminate states, allowing the masking logic to simply apply pre-computed masks rather than dynamically analyzing each output.
3Measurement precision
If mask data is used to specify which inputs to mask in each cycle, then precision in masking is improved, but memory and control requirements increase
Solution Approach 1:
The patent applies local quality by generating and applying different mask data for different scan chains and different time cycles. Each scan chain may have its own specific mask pattern, and masks can change from cycle to cycle based on which outputs are expected to contain indeterminate states. This localized approach ensures that only necessary outputs are masked, minimizing the impact on the overall system.
Data Source
AI summary
Scan tests tolerant to indeterminate states generated in an integrated circuit (IC) when employing signature analysis to analyze test outputs. Bits with indeterminate-state are masked when scanning out the bits from the scan chains to force such indeterminate bits to a known logic level. This prevents a signature generator receiving the outputs of a scan test from generating an invalid signature. In an embodiment, masking information is stored in encoded form in a memory. A decoding circuit decodes the masking information and provides mask data under control from a mask controller. Mask data is sent to a masking circuit which also receives corresponding bits from scan-out vectors, with each scan-out vector being generated by a corresponding one of multiple scan chains. The output of the masking circuit may be provided in a compressed form to the signature generator circuit.