Scan Chain Masking for Fault Coverage in IC Test Circuits

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Solution Overview

Problem

In integrated circuit testing, unknown values ('X') in scan chain outputs complicate fault detection and reduction, as they can interfere with known values and worsen test coverage, especially when scan data is compressed, making it difficult to localize faults accurately.

Innovation Solution

The implementation of a test circuit with a decompressor and compressor system that includes a mask block to selectively mask certain scan chains, allowing for configurable fanout modes to prevent the propagation of unknown values, thereby enhancing fault coverage and observability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If scan data is compressed to reduce data bandwidth and pins, then device complexity is reduced, but unknown values interfere with known values and reduce fault coverage

Engineering Contradiction:
Improvedata bandwidth and pinsVSAvoidfault coverage
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent segments scan chains into multiple groups, where each group is compressed independently into a separate bit stream. This segmentation prevents unknown values in one group from interfering with known values in other groups, thereby maintaining fault coverage while still achieving data compression. The test circuit includes multiple compressors that process different scan chain groups separately.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a mask block as an intermediary component between scan chains and the compressor. The mask block selectively masks (blocks) certain scan chains based on whether they contain unknown values, preventing those unknown values from propagating to the compressed output. This intermediary mechanism protects known values from contamination while allowing compression to proceed.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If scan chains are masked to prevent propagation of unknown values, then fault coverage is improved, but device complexity increases

Engineering Contradiction:
Improvefault coverageVSAvoidtest circuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic masking where the mask block can be configured to mask different scan chains based on the presence of unknown values in each chain. The masking is not fixed but adapts to the actual test conditions, allowing the system to maintain high fault coverage only when necessary while avoiding unnecessary complexity when all scan chains are clean.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9417287B2Scheme for masking output of scan chains in test circuit
Publication Date: 2016.08.16 SYNOPSYS INC
  • US9417287B2 patent drawing
  • US9417287B2 patent drawing
  • US9417287B2 patent drawing

AI summary

Operating a scan chain of a test circuit of an integrated circuit to have either a single fanout or multiple fanout to a compressor. The test circuit receives a fanout control signal for configuring the fanout of the scan chain. If the fanout control signal indicates configuring of the scan chain with a single fanout, the output of the scan chain is sent to one input of a compressor. If the fanout control signal indicates configuring of the scan chain with multiple fanout, the output of the scan chain is sent to multiple inputs of the compressor.