Scan Chain Security via Shadow Register Authentication

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Solution Overview

Problem

Existing scan architectures for testing integrated circuits (ICs) pose a security risk as they provide unauthorized access to device components, potentially compromising design security.

Innovation Solution

The implementation of a device with a scan chain, a shadow shift register, a signature register, and a comparator, where the shadow shift register is loaded during the scan in phase and the signature register is loaded during the capture phase, allowing only authorized access by matching the shadow shift register value with the signature register value.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a scan chain is provided for testing ICs, then testability is improved, but security is worsened due to unauthorized access

Engineering Contradiction:
ImprovetestabilityVSAvoidunauthorized access
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

A buffer element is introduced as an intermediary between the scan chain output and the external tester. This buffer acts as a security gatekeeper that mediates data flow based on authentication credentials, allowing legitimate testing while blocking unauthorized access attempts.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The scan chain incorporates self-service security mechanisms including credential verification and automatic authorization checks. The system performs its own authentication without external intervention, verifying credentials against stored authentication data and automatically controlling buffer enablement based on verification results.

Inventive Principle:
Principle #25Self-service

2Object-affected harmful factors

If security measures are added to prevent unauthorized access, then security is improved, but device complexity is worsened

Engineering Contradiction:
Improveunauthorized accessVSAvoidcircuit complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

Security functions are merged with existing scan chain infrastructure. The buffer element integrates with the scan chain output, and authentication credentials are stored within the same device structure. This combining approach adds security without requiring entirely separate security subsystems.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The buffer element serves multiple functions: it acts as a security gate for authentication, a data latch for credential storage, and a control element for managing scan chain output. This multi-functionality reduces the need for additional dedicated security components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12298346B2Secured scan access for a device including a scan chain
Publication Date: 2025.05.13 TEXAS INSTRUMENTS INC
  • US12298346B2 patent drawing
  • US12298346B2 patent drawing
  • US12298346B2 patent drawing

AI summary

A device includes a scan chain including a plurality of storage elements and an output buffer; a shadow shift register having a shadow shift input coupled to a scan output of one of the storage elements of the scan chain; a signature register; and a comparator having a first input, a second input, and an output. The comparator first input is to receive a value of the shadow shift register, and the comparator second input is to receive a value of the signature register. The output buffer has a control input coupled to the comparator output, and the output buffer provides a high-impedance output responsive to the value of the shadow shift register being unequal to the value of the signature register.