Scan Shift Clock Gating in Mesh Clocks for Timing Closure
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Solution Overview
Problem
Implementing a packetized scan fabric in a mesh clock environment is challenging due to difficulties in balancing clock skew while maintaining timing closure for both scan shift and stuck-at capture clocks, especially when using mesh clock techniques that distribute clocks across a large integrated circuit device.
Innovation Solution
A specialized integrated clock gating cell is introduced to selectively distribute scan shift and capture clocks independently from the mission mode clock, using a separate clock path for scan shift clocks and the mission mode clock, with a selection element like an OR-gate or multiplexer, and a balanced clock tree for scan shift clock delivery.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If mesh clock techniques are used to distribute clocks across a large integrated circuit device, then latency and skew are lowered and OCV tolerance is increased, but it becomes challenging to implement packetized scan fabric and close timing while minimizing clock skew
Solution Approach 1:
The patent segments the clock distribution system into separate paths: a mesh clock structure for mission mode operations and a dedicated scan clock bus for scan fabric operations. This segmentation allows each path to be optimized independently, with the scan clock bus specifically designed to provide balanced distribution to scan chain taps while the mesh clock handles general timing distribution.
Solution Approach 2:
The patent introduces a clock gating cell as an intermediary component that selectively gates the scan shift clock based on mode signals. This intermediary enables the system to switch between different clock sources (scan shift clock for scan mode, mesh clock for capture mode) without creating timing conflicts, thereby resolving the complexity of managing multiple clock domains.
2Reliability
If separate clock paths are used for scan shift and capture clocks, then timing closure is maintained, but device complexity increases
Solution Approach 1:
The patent merges the clock distribution functions by having the mesh clock structure serve dual purposes: providing clocks for mission mode operations and serving as the source for scan capture clocks through the clock gating cell. This merging reduces the need for entirely separate distribution infrastructure while maintaining timing closure through the selective gating mechanism.
Data Source
AI summary
Clock distribution circuitry, for distributing clocks for scan operations in an integrated circuit device in which a mission mode clock is distributed by a mesh clock structure and a scan fabric clock is distributed by a scan clock bus, includes a mesh clock source, and a local distribution structure for distributing the clocks for scan operations to a local clock domain that includes a subset of taps of the mesh clock structure. The local distribution structure includes a local controller for controlling derivation of a scan capture clock from the mesh clock source, local scan host circuitry for deriving a local scan shift clock from the scan fabric clock, and specialized integrated clock gates corresponding in number to the subset of taps of the mesh clock structure, for selecting between the scan capture clock in a scan capture mode, and the local scan shift clock in a scan shift mode.