Scan Driver Bias Voltage Control for Power Reduction
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Solution Overview
Problem
Current scan drivers face challenges in reducing power consumption while maintaining efficient operation, particularly in generating scan signals for display devices with varying driving frequencies and refresh rates.
Innovation Solution
The proposed scan driver incorporates multiple stages and charge pump circuits to generate scan signals using a combination of transistors and capacitors, with a bias voltage supplied by a charge pump circuit, allowing for efficient control of node voltages and output signals based on multiple power sources and clock signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a conventional scan driver is used to generate scan signals for display devices with varying driving frequencies and refresh rates, then the display device can operate with different refresh rates, but the power consumption increases
Solution Approach 1:
The scan driver dynamically adjusts its operating mode based on the driving frequency. At low driving frequencies, the first sub-stage circuit operates to generate scan signals with reduced power consumption. At high driving frequencies, the second sub-stage circuit takes over to maintain signal quality. This dynamic switching between operating modes allows the display device to adapt to varying refresh rates while optimizing power consumption for each frequency range
Solution Approach 2:
The invention changes the operational parameters of the scan driver by switching between two distinct sub-stage circuits with different characteristics. The first sub-stage circuit is optimized for low-frequency operation with lower power consumption, while the second sub-stage circuit is optimized for high-frequency operation. By changing which circuit is active based on the driving frequency threshold, the system achieves both adaptability and power efficiency
2Adaptability or versatility
If multiple sub-stage circuits are used to handle different driving frequencies, then the adaptability to various refresh rates improves, but the device complexity increases
Solution Approach 1:
The scan driver is segmented into two functional sub-stage circuits, each responsible for a specific frequency range. The first sub-stage circuit handles low-frequency operation, while the second sub-stage circuit handles high-frequency operation. This segmentation allows each circuit to be optimized for its specific function, achieving high adaptability while keeping individual circuit designs relatively simple and manageable
Data Source
AI summary
A scan driver is disclosed that includes a plurality of stages for supplying scan signals to scan lines. A first stage among the stages includes: a first sub-stage circuit for generating a first scan signal, based on an input signal, a first clock signal, a second clock signal, a first power source, and a second power source; and a first charge pump circuit for supplying a bias voltage to the first sub-stage circuit, based on a third power source. The first sub-stage circuit includes: a first driver for controlling voltages of a first node and a second node, based on the input signal, the first clock signal, the second clock signal, the first power source, and the second power source; a second driver for controlling a voltage of an output node, based on the voltage of the first node, the voltage of the second node, the first power source, and the second power source; and an output unit for outputting the first scan signal through a first output terminal, based on the voltage of the output node, the first power source, and the second power source.