Scan Driver Circuit Reduces Reverse Current in OLED Displays

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional scanning drivers in OLED displays experience high power consumption due to parasitic capacitors generating reverse currents, leading to non-uniform displays.

Innovation Solution

A scanning driver circuit with cascaded structures connected to timing clock lines with opposite phases, including transistors and capacitors, is designed to reduce reverse current by preventing slight-ON states of transistors, specifically using a first capacitor between the output terminal of a transistor and the scanning output line.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If conventional scanning driver circuit is formed with transistors and timing clock lines, then scanning function is achieved, but reverse current is generated due to parasitic capacitors leading to high power consumption

Engineering Contradiction:
Improvepower consumptionVSAvoidreverse current
Core Design Contradiction:
Loss of energyVSObject-generated harmful factors

Solution Approach 1:

The patent extracts and eliminates the parasitic capacitor from the circuit by redesigning the transistor configuration. Specifically, it uses a dual-gate transistor structure where the parasitic capacitor at the first gate is disconnected from affecting the second gate, thereby removing the source of reverse current while maintaining the scanning function

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a third gate as an intermediary element that controls the connection between the first and second gates. This third gate acts as a mediator that prevents the parasitic capacitor at the first gate from influencing the second gate, thereby blocking the reverse current path while allowing normal scanning operation

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If N rows in the entire screen work collaboratively, then complete screen display is achieved, but reverse current accumulates to several milliamperes causing non-uniform display

Engineering Contradiction:
Improvedisplay uniformityVSAvoidreverse current
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent removes the parasitic capacitor effect from each pixel unit through the dual-gate transistor design. By disconnecting the parasitic capacitor at the first gate from affecting the second gate, the reverse current source is extracted from the circuit, preventing accumulation across N rows and ensuring uniform display

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent segments the transistor into multiple independent gates (first gate, second gate, third gate) that can be controlled separately. This segmentation allows independent control of signal input and parasitic capacitor isolation, preventing reverse current generation in each pixel unit while maintaining overall screen collaboration

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUSRE48737E1Scan driver and organic light-emitting display using same
Publication Date: 2021.09.14 KUNSHAN NEW FLAT PANEL DISPLAY TECHNOLOGY CENTER CO LTD
  • USRE48737E1 patent drawing
  • USRE48737E1 patent drawing
  • USRE48737E1 patent drawing

AI summary

The present invention provides a scanning driver and an organic light-emitting display using the same. The scanning driver comprises a plurality of cascaded structures receiving signals from a first timing clock line (CK1) and a second timing clock line (CK2) with opposite phases, the cascaded structures successively generating output signals (i.e., scanning signals), wherein each of the cascaded structures comprises: a first transistor, connected to a starting signal line or to a scanning output line of a previous cascaded structure; a second transistor, connected to the second timing clock line and to the scanning output line; a third transistor connected to a high-level power supply VGH; a fourth transistor, connected to a low-level power supply VGL and to an output terminal of the third transistor; a fifth transistor, connected to a high-level power supply VGH and to a scanning output line; and a first capacitor, connected between an output terminal of the first transistor and the scanning output line. Arranging a first capacitor C1 between the output terminal of M1 and the scanning output line prevents slight-ON of M2, thus reducing the reverse current at the scanning driver and reducing the power consumption.