Scan Driver Clock Signal Alternation for Display Power Reduction
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Solution Overview
Problem
Display devices face challenges in maximizing luminous efficiency while increasing resolution in limited space, leading to increased power consumption due to inefficient pixel circuit and light emitting element layouts.
Innovation Solution
The display device incorporates a scan driver with alternating odd and even clock signals, and data lines connected to alternating color pixels, where color information is changed in units of time corresponding to 'k' times the horizontal period, minimizing power consumption without altering the pixel arrangement or circuit configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the pixel circuit and light emitting element layout is optimized for higher resolution, then the resolution in limited space is increased, but the luminous efficiency is reduced and power consumption increases
Solution Approach 1:
The patent applies periodic action by dividing the clock signal into alternating odd and even clock periods, where odd clock periods drive odd-numbered scan lines and even clock periods drive even-numbered scan lines. This periodic operation allows the scan driver to control different groups of pixels at different times, reducing the overall power consumption while maintaining high resolution display capabilities.
Solution Approach 2:
The patent segments the scan driver into two independent sub-scanners: a first sub-scan driver for odd-numbered scan lines and a second sub-scan driver for even-numbered scan lines. Each sub-scan driver operates independently with its own clock enable period, allowing segmented control of pixel circuits and reducing simultaneous power consumption across the entire display panel.
2Use of energy by moving object
If alternating odd and even clock signals are used to reduce power consumption, then power consumption is reduced, but the device complexity increases
Solution Approach 1:
The patent merges the functionality of two independent sub-scan drivers into a single scan driver integrated circuit. The first and second sub-scan drivers share common circuit resources including voltage supply lines, control logic, and physical integration within the same driver IC, reducing overall device complexity while maintaining the power-saving benefits of alternating clock operation.
Solution Approach 2:
The scan driver is designed with universal functionality to handle both odd and even scan lines through a single integrated circuit. The driver can selectively activate different sub-scanners based on the scan line being driven, providing multi-functional capability that reduces the need for separate dedicated drivers for each scan line group.
Data Source
AI summary
A display device includes a display panel, a scan driver outputting a scan signal, and a data driver. The scan driver includes a first sub-scan driver that receives a first start signal and an odd clock signal, and a second sub-scan driver that receives a second start signal and an even clock signal. The scan signal has an activation period corresponding to a horizontal period. The odd clock signal includes a first clock enable period and a first clock disable period, which are ‘k’ times greater than the horizontal period. The even clock signal includes a second clock enable period and a second clock disable period, which are ‘k’ times greater than the horizontal period. The first clock enable period and the second clock enable period alternate with one another.