Scan Driver Stage Circuit for Progressive and Concurrent Emission

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Solution Overview

Problem

Conventional organic light emitting displays face challenges in efficiently supplying scan signals to scan lines, particularly in implementing concurrent or progressive emission methods, which affect the display's ability to simultaneously or progressively output images with optimal luminance and power efficiency.

Innovation Solution

A stage circuit and scan driver design that incorporates progressive and concurrent drivers, utilizing transistors and clock signals to control voltages at specific nodes, allowing for simultaneous or progressive supply of scan signals to scan lines, ensuring non-overlapping gate-on voltage supply times and synchronized control signals for efficient image generation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a conventional scan driver is used to supply scan signals, then the display can operate in progressive emission mode, but it cannot efficiently implement concurrent emission mode

Engineering Contradiction:
Improveemission mode capabilityVSAvoiddriver circuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The scan driver is designed with dual functionality to support both progressive emission mode and concurrent emission mode. The driver includes multiple output units (first output unit with first transistor, second output unit with second transistor, third output unit with third transistor) that can be controlled by different clock signals (first clock signal, second clock signal) to achieve different emission modes through a single unified circuit structure.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If concurrent emission mode is implemented, then image generation efficiency is improved, but power consumption increases due to overlapping voltage supply

Engineering Contradiction:
Improveimage generation efficiencyVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The driver uses periodic clock signals (first clock signal, second clock signal) with specific timing relationships to control the switching of transistors. The clock signals are designed with non-overlapping active periods to ensure that voltage is supplied to different scan lines in a periodic sequence rather than simultaneously, enabling concurrent emission while controlling power consumption through timed periodic action.

Inventive Principle:
Principle #19Periodic action

3Use of energy by moving object

If progressive emission mode is used, then power consumption is reduced, but image generation speed is limited

Engineering Contradiction:
Improvepower consumptionVSAvoidimage generation speed
Core Design Contradiction:
Use of energy by moving objectVSSpeed

Solution Approach 1:

The scan driver dynamically switches between progressive emission mode and concurrent emission mode based on operational requirements. The circuit can adapt its operating characteristics by selecting different clock signal configurations and transistor switching patterns, allowing the system to optimize between power consumption and image generation speed dynamically rather than being fixed in one mode.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8803562B2Stage circuit and scan driver using the same
Publication Date: 2014.08.12 SAMSUNG DISPLAY CO LTD
  • US8803562B2 patent drawing
  • US8803562B2 patent drawing
  • US8803562B2 patent drawing

AI summary

A stage circuit includes an output unit including a first transistor coupled between a first power source and an output terminal of the stage circuit, and having a gate electrode coupled to a first node, a second transistor coupled between the output terminal and a third input terminal of the stage circuit, and having a gate electrode coupled to a second node, and a third transistor coupled between the output terminal and a second power source, and having a gate electrode coupled to a third node; a progressive driver coupled to first, second, and sixth input terminals of the stage circuit; and a concurrent driver coupled to at least one of fourth and fifth input terminals of the stage circuit. In the stage circuit, clock signals supplied to the first, second, and third input terminals during the second period are concurrently set to a gate-on or gate-off voltage.