Scan Driver Circuit Layout Area Reduction
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Solution Overview
Problem
Conventional scan drivers for display panels require a large circuit layout area, which increases hardware costs and complexity, and existing solutions do not effectively reduce the number of shift registers and de-multiplexers needed to drive multiple scan lines efficiently.
Innovation Solution
A scan driver design utilizing multiple stages of first driving units, each comprising a shift register and a de-multiplexer, where the shift register generates a scan signal and the de-multiplexer selectively outputs it to multiple scan lines using a selection signal, reducing the number of TFTs and circuit area by sharing trigger signals between stages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If conventional scan driver design is used, then the display panel can be driven, but the circuit layout area is large increasing hardware cost and complexity
Solution Approach 1:
The scan driver is divided into multiple stages, where each stage contains a shift register and a de-multiplexer. This segmentation allows the system to drive multiple scan lines efficiently while reducing the total number of components needed compared to conventional designs.
Solution Approach 2:
Each shift register in the multi-stage configuration serves multiple functions by generating scan signals that are distributed to multiple scan lines through de-multiplexers. This multi-functionality reduces the overall number of shift registers needed, thereby reducing circuit layout area and hardware complexity.
2Adaptability or versatility
If more shift registers and de-multiplexers are used to drive multiple scan lines, then the scanning coverage is improved, but the hardware area and cost increase
Solution Approach 1:
Multiple scan line driving functions are merged into a multi-stage architecture where shared shift registers and de-multiplexers work together. This combining approach allows comprehensive scan line coverage while minimizing the total component count and circuit area.
Solution Approach 2:
The patent introduces a multi-stage dimension to the scan driver architecture, organizing shift registers and de-multiplexers in stages that efficiently cover multiple scan lines. This dimensional organization reduces the footprint compared to a flat, conventional design.
Data Source
AI summary
The present invention provides a scan driver and a display using the same. The scan driver includes multiple stages of driving units. The driving units are controlled by a start signal, a clock signal and at least one selection signal. The ith stage of the driving unit includes a shift register and a de-multiplexer. The shift register generates a scan signal according to the clock signal and a trigger signal. The de-multiplexer selectively outputs the scan signal to multiple scan lines according to the at least one selection signal. The trigger signal of the 1st stage of the driving unit is the start signal, and the trigger signal of the (i+1)th stage of the driving unit is the scan signal of the ith stage of the driving unit.