Scan Driver Stages for Selective Pixel Transistor Measurement
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Solution Overview
Problem
Existing display devices lack the capability to selectively measure mobility information and threshold voltage information of driving transistors in pixels, which affects display performance and longevity.
Innovation Solution
A scan driver with stages that include input, output, and sampling circuits using oxide semiconductor transistors to control and generate scan signals, allowing selective pixel activation and measurement of transistor characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional scan driver is used, then the display device can operate normally, but it cannot selectively measure mobility information and threshold voltage information of pixel transistors
Solution Approach 1:
The scan driver is designed to perform multiple functions: it can sequentially select pixels for normal display operation and also selectively activate specific pixels for measuring mobility information and threshold voltage information. The same scan driver circuitry is used for both display driving and transistor parameter measurement, eliminating the need for separate measurement equipment.
Solution Approach 2:
The scan driver is divided into multiple stages, where each stage corresponds to a specific pixel row. By controlling which stages receive scan signals, the system can selectively measure parameters of specific pixels while leaving other pixels for normal display operation. This segmentation enables targeted measurement without affecting the entire display.
2Measurement precision
If all pixels are activated for measurement, then comprehensive transistor data can be collected, but display performance and responsiveness are degraded
Solution Approach 1:
Instead of activating all pixels for measurement, the system activates only the specific pixel rows needed for measurement during designated time periods. The scan driver selectively applies scan signals to particular stages, measuring parameters of only those pixels while leaving other pixels available for normal display refresh operations.
Solution Approach 2:
The measurement operation is performed periodically during blanking intervals or specific time slots when the display is not actively refreshing. The scan driver alternates between normal display mode and measurement mode, collecting transistor parameter data over multiple frames without continuously impacting display performance.
3Adaptability or versatility
If selective pixel activation is implemented, then transistor parameter measurement is enabled, but the scan driver circuit complexity increases
Solution Approach 1:
The sampling circuits included in each stage are designed to serve dual purposes: they can sample pixel signals during normal display operation and also enable selective activation of specific stages for measurement. This multi-functionality is achieved through control signals that switch the sampling circuits between different operational modes.
Solution Approach 2:
The scan driver structure nests multiple functional elements within each stage: input circuits, sampling circuits, output circuits, and measurement enablement logic are all integrated within the same stage architecture. This nested design allows selective activation of measurement functionality without adding separate external measurement circuits.
Data Source
AI summary
A scan driver includes a plurality of stages. An nth (n is a natural number) stage among the stages includes: a first and a second input circuit for controlling a voltage of a first node in response to a carry signal of a previous stage and a next stage, respectively; a first output circuit for outputting an nth carry signal corresponding to a carry clock signal in response to the voltage of the first node; a second output circuit for outputting an nth scan and an nth sensing signal corresponding to a scan and a sensing clock signal, respectively, in response to the voltage of the first node; and a sampling circuit for storing the carry signal of the previous stage in response to a first select signal, and for supplying a control voltage to the first node in response to a second select signal and the stored carry signal.