Scan Driver Selective Drive Circuit Sharing
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Solution Overview
Problem
Existing scan drivers for display devices face inefficiencies in sharing selective drive circuits among stages, leading to increased dead space and reduced capability for selective sensing of pixel strings.
Innovation Solution
A scan driver configuration where multiple stages share a single selective drive circuit, utilizing transistors and capacitors to control voltage nodes and supply scan signals, enabling selective sensing of pixel strings and reducing dead space by overlapping control signals and using phase-shifted clock signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If each stage has its own selective drive circuit, then each stage can independently select pixel strings, but the device complexity and dead space increase
Solution Approach 1:
Multiple stages share a common selective drive circuit instead of each stage having its own independent circuit. The shared circuit includes transistors (T21-T25) and capacitors that are collectively controlled to enable selective sensing across different stages, reducing overall circuit complexity and dead space while maintaining the capability to selectively sense pixel strings in any stage.
2Area of stationary object
If multiple stages share a selective drive circuit, then dead space is reduced, but the control signal timing becomes more complex
Solution Approach 1:
The shared selective drive circuit is controlled using periodic clock signals (CLK1-CLK6) that are phase-shifted and sequentially activated. Each clock signal controls specific transistors in the shared circuit at different time periods, enabling time-multiplexed operation where the same circuit serves multiple stages at different times, thereby reducing dead space while managing control complexity through regular timing patterns.
3Productivity
If control signals are overlapped to enable selective sensing, then sensing capability is improved, but signal interference may occur
Solution Approach 1:
The control signals are segmented into distinct time periods using phase-shifted clock signals. Each clock signal (CLK1-CLK6) controls specific operations in non-overlapping time windows, allowing the shared selective drive circuit to serve different stages at different times without signal interference. This time-division multiplexing enables efficient selective sensing while preventing harmful signal overlap.
Data Source
AI summary
A scan driver including stages that are connected to scan lines respectively and supply scan signals to the scan lines in response to voltages of 11th and 12th nodes, and a selective drive circuit that is connected to i (i is a natural number of 2 or greater) stages and includes a first node and a second node. Each of the stages includes a first connection transistor that is connected between the first node and the 11th node and a second connection transistor that is connected between the second node and the 12th node. The first connection transistor and the second connection transistor are turned on by a second control signal to electrically connect the first node to the 11th node and the second node to the 12th node, respectively.