Scan Driver Dual-Gate Pull-Down Control for Stable Scan Signals
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Solution Overview
Problem
Existing scan drivers face challenges in stably outputting scan signals, which can affect the performance and stability of display apparatuses, particularly in handling moving and still images.
Innovation Solution
The proposed scan driver incorporates a novel design with multiple stages, each comprising node controllers, pull-up and pull-down transistors, and voltage controllers to ensure synchronized and stable output of gate control signals, including carry signals, for both moving and still images.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional scan driver designs are used, then the device complexity is lower, but the reliability of scan signal output deteriorates
Solution Approach 1:
The scan driver is divided into multiple stages, with each stage independently generating scan signals for specific scan lines. Each stage contains separate node controllers for different voltage levels (first voltage level for on-state, second voltage level for off-state), allowing independent optimization of each segment's signal output stability without affecting the entire system.
Solution Approach 2:
Different node controllers within each stage are designed with specialized functions: the first node controller generates gate control signals at the first voltage level for turning on pixel transistors, while the second node controller generates gate control signals at the second voltage level for turning off pixel transistors. This local specialization ensures optimal signal characteristics for each specific function, improving overall reliability.
2Productivity
If synchronized output of gate control signals is implemented, then the performance for handling moving and still images is improved, but the device complexity increases
Solution Approach 1:
Multiple gate control signals (first gate control signal for on-state, second gate control signal for off-state, and carry signals) are generated and output in a synchronized manner through coordinated operation of node controllers within the same stage. This merging of control functions into a unified synchronized output mechanism improves image handling performance by ensuring proper timing coordination across all pixel rows.
Solution Approach 2:
The node controllers are designed to generate gate control signals at appropriate voltage levels in advance of the actual pixel switching requirements. The first node controller prepares the first voltage level signals, and the second node controller prepares the second voltage level signals, ensuring that synchronized output is achieved without adding complex real-time conversion mechanisms.
Data Source
AI summary
According to an embodiment, a scan driver includes a plurality of stages. An output controller of each of the stages includes a pull-down transistor, and the pull-down transistor includes a first gate and a second gate, where the first gate is electrically connected to a third control node or a node electrically connected to the third control node, and the second gate is connected to a third voltage input terminal to which a third voltage of a second voltage level is applied.