Scan Driver Stages for Large Panel Voltage Ripple Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing scan drivers face challenges in maintaining stability and efficiency when applied to large panels, particularly in supplying scan signals to multiple scan lines while minimizing load and preventing voltage ripples.
Innovation Solution
The proposed scan driver design includes stages connected to scan lines, with a controller and output unit that manage clock signals and carry signals to maintain gate on and off voltages, using transistors and capacitors to stabilize node voltages and minimize voltage ripples, allowing for efficient scan signal distribution across a large panel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a scan driver is applied to a large panel to increase the area of the display device, then the area of the stationary object is improved, but voltage ripples occur and driving stability deteriorates
Solution Approach 1:
The scan driver is divided into multiple stages, with each stage responsible for driving a specific group of scan lines. This segmentation allows the driver to be applied to large panels while maintaining stable operation by distributing the driving load across multiple independent stages, preventing voltage ripples that would occur in a monolithic design.
2Productivity
If multiple clock signals are supplied to stages to improve scan signal distribution across large panels, then the productivity is improved, but voltage ripples are generated on clock signals increasing device complexity
Solution Approach 1:
Multiple clock signals are supplied to different stages in a periodic manner, with each stage receiving clock signals at specific time intervals. This periodic action enables efficient scan signal distribution across large panels while managing voltage ripples through synchronized timing, avoiding continuous high-frequency switching that would increase device complexity.
3Reliability
If transistor sizes are increased to reduce voltage ripple impact, then the reliability is improved, but the manufacturing precision requirements increase
Solution Approach 1:
Instead of uniformly increasing transistor sizes, the invention optimizes the size parameters of specific transistors based on their functional roles in the circuit. By carefully selecting and adjusting the size parameters of key transistors involved in clock signal switching and voltage regulation, the design achieves voltage ripple resistance without imposing stringent manufacturing precision requirements across all transistors.
Data Source
AI summary
There is provided a scan driver. The scan driver includes stages. An ith (i is a natural number) stage circuit includes an output unit, a controller configured to control the voltage of the second node in response to a kth (k is a natural number) clock signal supplied to a second input terminal, and an input unit configured to control the voltages of the first node and the second node in response to a carry signal of a previous stage that is supplied to a third input terminal and a carry signal of at least one next stage. The kth clock signal maintains a gate on voltage at a point of time at which a voltage of the jth clock signal is changed to a gate on voltage.