Scan Driver Bias Electrode Layout for Oxide Threshold Control

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Solution Overview

Problem

Existing scan drivers in display devices face reliability issues due to the influence of bias voltage on oxide transistors, which affects the threshold voltage.

Innovation Solution

The bias electrodes of the first and second oxide transistors in the scan driver are positioned at different layers, allowing for the adjustment of the threshold voltage and improving the reliability of the scan driver.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the bias electrode of the oxide transistor is positioned at a single layer, then the device complexity is reduced, but the threshold voltage control precision deteriorates

Engineering Contradiction:
Improvestructure complexityVSAvoidthreshold voltage control precision
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent applies dimensionality change by moving the bias electrode from a single-layer configuration to a multi-layer configuration. Specifically, the bias electrode is divided into first and second bias electrodes positioned at different layers (first gate layer and second gate layer respectively), allowing independent voltage application in the vertical dimension. This enables precise control of threshold voltage without significantly increasing overall device complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent segments the single bias electrode into multiple separate bias electrodes positioned at different layers. The first bias electrode is positioned at the first gate layer while the second bias electrode is positioned at the second gate layer, allowing independent control of threshold voltage through separate voltage applications to each segment.

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If the bias electrodes are positioned at different layers, then the threshold voltage control precision is improved, but the device complexity increases

Engineering Contradiction:
Improvethreshold voltage control precisionVSAvoidstructure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent utilizes the vertical dimension by positioning bias electrodes at different layers (first gate layer and second gate layer). This dimensional approach allows precise threshold voltage control through independent voltage application to each layer, while the overall structure remains integrated and manageable.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The multi-layer bias electrode configuration serves multiple functions: it enables precise threshold voltage control, allows independent adjustment of different transistor characteristics, and maintains compatibility with existing display device architectures. The first and second bias electrodes can be controlled independently to achieve various operating conditions.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20260011290A1Scan driver and display device including the same
Publication Date: 2026.01.08 SAMSUNG DISPLAY CO LTD
  • US20260011290A1 patent drawing
  • US20260011290A1 patent drawing
  • US20260011290A1 patent drawing

AI summary

Provided are a scan driver and a display device including the same. A display device includes a pixel including a light-emitting element, and a first transistor configured to supply a driving current to the light-emitting element, a scan driver including a first oxide transistor, and configured to supply a scan signal to the pixel, a first active layer above a substrate, and including a first material, a first gate layer above the first active layer, a second gate layer above the first gate layer, and a second active layer above the second gate layer, including a second material that is different from the first material, and including a semiconductor region of the first transistor and a semiconductor region of the first oxide transistor, wherein a bias electrode of the first transistor and a bias electrode of the first oxide transistor are at different layers.