Scan Driving Circuit for Display Devices with Multiple Pulse Signals
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing display devices with light-emitting units face challenges in maintaining uniform luminance due to irregularities in threshold voltage of driving transistors, leading to non-uniform current flow and luminance issues, and require circuits that can supply signals to scanning, initialization, and display control lines without affecting each other.
Innovation Solution
A scan driving circuit with a shift register unit and logic circuit unit that generates scanning signals based on output signals from shift registers, enabling multiple pulse signals to be supplied to display control lines within one field period without impacting signals to scanning and initialization control lines, using a configuration with P stages of shift registers and (P−2)×Q NAND circuits to manage start pulses and period identifying signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple pulse signals are supplied to display control lines during one field period to switch light emission states multiple times, then the display element can be controlled to emit light multiple times, but the signals to scanning lines and initialization control lines may be affected
Solution Approach 1:
The patent segments the control signals into different types (scanning signals, initialization control signals, and display control signals) and uses separate driving circuits for each type. The scan driving circuit generates scanning signals, while separate circuits generate initialization and display control signals, ensuring that multiple pulse signals to display control lines do not interfere with scanning and initialization signals.
Solution Approach 2:
The patent introduces an intermediary mechanism where the scan driving circuit outputs scanning signals that are independently controlled from display control signals. The driving circuit includes separate control paths where display control signals can be pulsed multiple times without affecting the scanning signal timing, as the scanning signal generation is mediated through a separate control mechanism.
2Device complexity
If a simple matrix method is used to drive display elements, then the driving circuit structure is simple, but the luminance uniformity is poor due to threshold voltage irregularities in driving transistors
Solution Approach 1:
The patent changes the control parameter from simple matrix driving to a method that incorporates multiple pulse signals with specific timing and amplitude characteristics. By controlling the display control lines with multiple pulses during one field period, the system compensates for threshold voltage variations in the driving transistors, achieving more uniform luminance while maintaining relatively simple circuit structure.
3Adaptability or versatility
If the scan driving circuit supplies signals to scanning lines, initialization control lines, and display control lines, then all control functions are integrated, but the layout area and circuit complexity increase
Solution Approach 1:
The patent implements a universal scan driving circuit that can supply signals to multiple types of control lines (scanning lines, initialization control lines, and display control lines) through a multi-functional design. The circuit uses P stages of shift registers and (P-2)×Q NAND circuits to generate different control signals from a single integrated structure, reducing the need for separate dedicated circuits for each function and thereby minimizing layout area.
Data Source
AI summary
A scan driving circuit includes a shift register unit and a logic circuit unit. The start of a start pulse of an output signal STp+1 of a p+1'th shift register is situated between the start and end of a start pulse of the output signal STp of a p'th shift register, and one each of a first enable signal through a Q'th enable signal exist in sequence between the start of the start pulse of the output signal STp and the start of the start pulse of the output signal STp+1. The operations of a (p′, q)'th NAND circuit are restricted based on period identifying signals, such that the NAND circuit generates scanning signals based only on a portion of the output signal STp corresponding to the first start pulse, the signal obtained by inverting the output signal STp+1, and the q'th enable signal ENq.