Scan Driving Circuit for OLED Displays
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Solution Overview
Problem
Conventional scan driving circuits for organic light emitting displays suffer from high power consumption due to static current flow, voltage level deviations, and reduced discharge efficiency, particularly exacerbated by transistor characteristic deviations in organic light emitting display panels.
Innovation Solution
A scan driving circuit utilizing PMOS or NMOS transistors that operate with four clocks to manage input and output signals through a transistor, switch section, and storage section, allowing for efficient voltage switching and maintenance, thereby reducing power consumption and improving signal accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a master-slave flip-flop is used in the scan driving circuit, then the circuit can sequentially shift and output scan signals, but static current flows through half of all inverters causing power consumption to increase
Solution Approach 1:
The patent divides the scan driving circuit into multiple independent stages (first stage, second stage, third stage, fourth stage), each with its own transistor, switch section, and storage section. This segmentation allows each stage to operate independently with controlled current flow, eliminating the need for continuous static current through all inverters while maintaining sequential scan signal generation capability.
Solution Approach 2:
The patent employs periodic clock signals (first clock, second clock, third clock, fourth clock) to control the operation of each stage. The switch section transfers voltage to the output terminal according to the first clock, and the storage section maintains voltage for a predetermined time, creating periodic action that eliminates continuous static current flow while maintaining functional operation.
2Ease of manufacture
If transistors with great characteristic deviation are used in the display panel, then the display can be manufactured with standard processes, but voltage level deviations occur causing erroneous operation
Solution Approach 1:
The patent changes the voltage levels dynamically through controlled switching. The switch section transfers a first voltage to the output terminal according to the first clock, and the storage section maintains this voltage level. This parameter control compensates for transistor characteristic deviations by ensuring consistent voltage levels at each stage, preventing erroneous operation while maintaining manufacturing standardization.
3Power
If an inverter is used to charge the output terminal, then the output voltage can be generated, but the discharge current is reduced rapidly causing discharge efficiency to deteriorate
Solution Approach 1:
The patent replaces the traditional inverter-based charging mechanism with a transistor-based voltage transfer system. The transistor turns on/off the connection of the input terminal according to the second clock, and the switch section transfers voltage according to the first clock. This substitution eliminates the rapid discharge current reduction problem by providing controlled voltage transfer without the need for inverter-based charging, thereby improving discharge efficiency while maintaining output voltage generation capability.
Data Source
AI summary
A scan driving circuit includes a plurality of stages. Each stage receives three of four clocks that may be sequentially generated, receives and delays an input signal through an input terminal, and outputs an output signal through an output terminal. The input terminal of each stage is connected to the output terminal of a previous one of the stages. Each stage includes a transistor, a switch section, and a storage section. The transistor turns off/on a connection of the input terminal according to a second clock. The switch section transfers a first voltage to the output terminal according to a first clock and prevents the first voltage from being transferred to the output terminal according to the input signal. The storage section maintains a voltage of the output terminal for a predetermined time and transfers a voltage of a third clock to the output terminal according to the input signal.