Scan Driving Circuit Eliminates Clock Phase Inversion
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Solution Overview
Problem
Conventional scan driving circuits require phase inversion of clock signals, leading to increased dynamic power consumption due to cascaded stages needing separate processing for clock signals CK and XCK, resulting in higher power usage.
Innovation Solution
A scan driving circuit design that includes an input control module, latch module, driving-signal generation module, and output control module, utilizing switching transistors to generate and manage control signals without the need for phase inversion, allowing cascaded signals to be opposite in phase, thereby reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If phase inversion processing is performed on clock signals for each cascaded stage, then the scan driving circuit can operate with proper clock timing, but the dynamic power consumption increases
Solution Approach 1:
The patent merges the phase inversion function into the cascade signal generation mechanism itself. The cascade signals naturally provide the required phase relationships for multiple stages without requiring separate phase inversion circuits at each stage. This consolidation eliminates redundant phase inversion operations and reduces overall power consumption while maintaining proper clock timing across all cascaded stages.
Solution Approach 2:
The cascade signals serve multiple functions simultaneously: they provide stage identification, enable sequential operation control, and inherently establish the phase relationships needed for proper clock timing. This multi-functionality eliminates the need for dedicated phase inversion circuits at each stage, thereby reducing the number of active components and lowering dynamic power consumption across the entire scan driving circuit.
2Reliability
If separate phase inversion processing is implemented at each cascaded stage, then proper clock signal timing is achieved, but the circuit structure becomes more complex
Solution Approach 1:
The patent combines the phase inversion functionality into the cascade signal distribution mechanism. Instead of having separate phase inversion circuits at each stage, the cascade signals themselves carry the phase information needed for proper timing. This merging reduces the number of discrete components and simplifies the overall circuit structure while maintaining reliable clock signal timing across all stages.
Solution Approach 2:
The patent extracts the phase inversion function from individual stage circuits and relocates it to the cascade signal generation mechanism. By taking out the redundant phase inversion operations from each stage and consolidating them at the cascade signal level, the circuit structure is simplified while the essential timing functionality is preserved.
Data Source
AI summary
A scan driving circuit is provided. The scan driving circuit for driving cascaded scan lines includes a scan driving circuit, a latch module, a driving-signal generation module, an output control module, a high gate voltage source, and a low level gate voltage. The scan driving circuit of the present invention conducts a driving operation for the latch module by a first cascade signal and a second cascade signal, so that a clock signal is not required to be processed with a phase inversion, and thereby the scan driving circuit has less overall power consumption.